Patent classifications
H01L2224/05012
Semiconductor device
A semiconductor device includes a semiconductor element, a first lead including a mounting portion for the semiconductor element and a first terminal portion connected to the mounting portion, and a sealing resin covering the semiconductor element and a portion of the first lead. The mounting portion has a mounting-portion front surface and a mounting-portion back surface opposite to each other in a thickness direction, with the semiconductor element mounted on the mounting-portion front surface. The sealing resin includes a resin front surface, a resin back surface and a resin side surface connecting the resin front surface and the resin back surface. The mounting-portion back surface of the first lead is flush with the resin back surface. The first terminal portion includes a first-terminal-portion back surface exposed from the resin back surface, in a manner such that the first-terminal-portion back surface extends to the resin side surface.
CHIP, CIRCUIT BOARD AND ELECTRONIC DEVICE
The present disclosure relates to a chip, a circuit board and an electronic device. The chip includes a chip substrate and a plurality of pads arrayed on the chip substrate. At least one of the plurality of pads on the chip is a polygonal pad.
Semiconductor packages with external bump pads having trench portions and semiconductor modules including the semiconductor packages
A semiconductor package includes a semiconductor chip including a chip pad and an external bump pad electrically connected to the chip pad of the semiconductor chip. The external bump pad may include a trench portion extending from a perimeter surface of the external bump pad toward a center of the external bump pad. The semiconductor package includes an external connector on the external bump pad, with the external connector including a portion that is in the trench portion of the external bump pad.
STRUCTURE AND METHOD FOR SEMICONDUCTOR PACKAGING
A semiconductor packaging structure includes a die including a bond pad and a first metal layer structure disposed on the die, the first metal layer structure having a first width, the first metal layer structure including a first metal layer, the first metal layer electrically coupled to the bond pad. The semiconductor packaging structure also includes a first photosensitive material around sides of the first metal layer structure and a second metal layer structure disposed over the first metal layer structure and over a portion of the first photosensitive material, the second metal layer structure electrically coupled to the first metal layer structure, the second metal layer structure having a second width, where the second width is greater than the first width. Additionally, the semiconductor packaging structure includes a second photosensitive material around sides of the second metal layer structure.
Semiconductor device
A semiconductor device includes a semiconductor element, a first lead including a mounting portion for the semiconductor element and a first terminal portion connected to the mounting portion, and a sealing resin covering the semiconductor element and a portion of the first lead. The mounting portion has a mounting-portion front surface and a mounting-portion back surface opposite to each other in a thickness direction, with the semiconductor element mounted on the mounting-portion front surface. The sealing resin includes a resin front surface, a resin back surface and a resin side surface connecting the resin front surface and the resin back surface. The mounting-portion back surface of the first lead is flush with the resin back surface. The first terminal portion includes a first-terminal-portion back surface exposed from the resin back surface, in a manner such that the first-terminal-portion back surface extends to the resin side surface.
Method of manufacturing semiconductor structure having polygonal bonding pad
The present disclosure provides a method for manufacturing a semiconductor structure. The method includes providing a substrate having a redistribution layer (RDL); disposing an etch stop layer over a RDL; patterning the dielectric layer and the etch stop layer; disposing a first seed layer over the etch stop layer and a portion of the dielectric layer that is exposed through the etch stop layer; disposing a second patterned photoresist over the first seed layer; disposing a conductive material over a portion of the first seed layer that is exposed through the second patterned photoresist; removing the second patterned photoresist; removing the etch stop layer; and removing a portion of the conductive material that protrudes from the dielectric layer to form a bonding pad adjacent to the conductive plug and surrounded by the dielectric layer.
Metal pad modification
The present invention provides a structure. In an exemplary embodiment, the structure includes a base material, at least one metal pad, where a first surface of the metal pad is in contact with the base material, and a metal pedestal, where the metal pedestal is in contact with the metal pad, where a radial alignment of the metal pad is shifted by an offset distance, with respect to the metal pedestal, such that the metal pad is shifted towards a center axis of the base material, where a first dimension of the metal pad is smaller than a second dimension of the metal pad, where the second dimension is orthogonal to a line running from a center of the metal pad to the center axis of the base material, where the first dimension is parallel to the line.
Microelectronic devices and apparatuses having a patterned surface structure
A connector structure and a manufacturing method thereof are provided. The connector structure includes a semiconductor substrate, a metal layer, a passivation layer, and a conductive structure. The metal layer is over the semiconductor substrate. The passivation layer is over the metal layer and includes an opening. The conductive structure is in contact with the metal layer in a patterned surface structure of the conductive structure through the opening of the passivation layer.
Semiconductor structure, redistribution layer (RDL) structure, and manufacturing method thereof
The present disclosure relates to a redistribution layer (RDL) structure, a manufacturing method thereof, and a semiconductor structure having the same. The RDL structure includes an RDL, disposed on a substrate, and including a bond pad portion and a wire portion connected to the bond pad portion, where a thickness of the bond pad portion is greater than a thickness of the wire portion.
MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE THEREOF
A semiconductor structure is provided. The semiconductor structure includes an interconnection structure, a first conductive pad, a second conductive pad, a conductive material and a conductive coil. The first and second conductive pads are disposed over and electrically connected to the interconnection structure individually. The conductive material is electrically isolated from the interconnection structure, wherein bottom surfaces of the conductive material, the first conductive pad and the second conductive pad are substantially aligned. The conductive coil is disposed in the interconnection structure and overlapped by the conductive material. A manufacturing method of a semiconductor structure is also provided.