The present disclosure relates to an integrated chip structure having a first copper pillar disposed over a metal pad of an interposer substrate. The first copper pillar has a sidewall defining a recess. A nickel layer is disposed over the first copper pillar and a solder layer is disposed over the first copper pillar and the nickel layer. The solder layer continuously extends from directly over the first copper pillar to within the recess. A second copper layer is disposed between the solder layer and a second substrate.

The present disclosure relates to an integrated chip structure having a first copper pillar disposed over a metal pad of an interposer substrate. The first copper pillar has a sidewall defining a recess. A nickel layer is disposed over the first copper pillar and a solder layer is disposed over the first copper pillar and the nickel layer. The solder layer continuously extends from directly over the first copper pillar to within the recess. A second copper layer is disposed between the solder layer and a second substrate.

A semiconductor package includes a first semiconductor chip that has a mount region and an overhang region, a substrate disposed on a bottom surface at the mount region of the first semiconductor chip, and a molding layer disposed on the substrate. The molding layer includes a first molding pattern disposed on a bottom surface at the overhang region of the first semiconductor chip and covering a sidewall of the substrate, and a second molding pattern on the first molding pattern and covering a sidewall of the first semiconductor chip.

A semiconductor package includes a first semiconductor chip that has a mount region and an overhang region, a substrate disposed on a bottom surface at the mount region of the first semiconductor chip, and a molding layer disposed on the substrate. The molding layer includes a first molding pattern disposed on a bottom surface at the overhang region of the first semiconductor chip and covering a sidewall of the substrate, and a second molding pattern on the first molding pattern and covering a sidewall of the first semiconductor chip.

An inventive semiconductor device includes: a semiconductor chip including an integrated circuit; a plurality of electrode pads provided on the semiconductor chip and connected to the integrated circuit; a rewiring to which the electrode pads are electrically connected together, the rewiring being exposed on an outermost surface of the semiconductor chip and having an exposed surface area greater than the total area of the electrode pads; and a resin package which seals the semiconductor chip.

An inventive semiconductor device includes: a semiconductor chip including an integrated circuit; a plurality of electrode pads provided on the semiconductor chip and connected to the integrated circuit; a rewiring to which the electrode pads are electrically connected together, the rewiring being exposed on an outermost surface of the semiconductor chip and having an exposed surface area greater than the total area of the electrode pads; and a resin package which seals the semiconductor chip.

An adhesive for a semiconductor, comprising an epoxy resin, a curing agent, and a compound having a group represented by the following formula (1): ##STR00001##
wherein R.sup.1 represents an electron-donating group.

An adhesive for a semiconductor, comprising an epoxy resin, a curing agent, and a compound having a group represented by the following formula (1): ##STR00001##
wherein R.sup.1 represents an electron-donating group.

Compression cold welding methods, joint structures, and hermetically sealed containment devices are provided. The method includes providing a first substrate having at least one first joint structure which comprises a first joining surface, which surface comprises a first metal; providing a second substrate having at least one second joint structure which comprises a second joining surface, which surface comprises a second metal; and compressing together the at least one first joint structure and the at least one second joint structure to locally deform and shear the joining surfaces at one or more interfaces in an amount effective to form a metal-to-metal bond between the first metal and second metal of the joining surfaces. Overlaps at the joining surfaces are effective to displace surface contaminants and facilitate intimate contact between the joining surfaces without heat input. Hermetically sealed devices can contain drug formulations, biosensors, or MEMS devices.

Compression cold welding methods, joint structures, and hermetically sealed containment devices are provided. The method includes providing a first substrate having at least one first joint structure which comprises a first joining surface, which surface comprises a first metal; providing a second substrate having at least one second joint structure which comprises a second joining surface, which surface comprises a second metal; and compressing together the at least one first joint structure and the at least one second joint structure to locally deform and shear the joining surfaces at one or more interfaces in an amount effective to form a metal-to-metal bond between the first metal and second metal of the joining surfaces. Overlaps at the joining surfaces are effective to displace surface contaminants and facilitate intimate contact between the joining surfaces without heat input. Hermetically sealed devices can contain drug formulations, biosensors, or MEMS devices.