A method for bonding of a first, at least partially metallic contact surface of a first substrate to a second, at least partially metallic contact surface of a second substrate, with the following steps, especially the following progression: application of a sacrificial layer which is at least partially, especially predominantly soluble in the material of at least one of the contact surfaces to at least one of the contact surfaces, bonding of the contact surfaces with at least partial solution of the sacrificial layer in at least one of the contact surfaces.

A semiconductor device includes a semiconductor body with a front face and a back face, having an active zone located at the front face, a front surface metallization layer having a front face and a back face directed towards the active zone, the front surface metallization layer being provided on the front face of the semiconductor body and being electrically connected to the active zone, and a first barrier layer, including amorphous molybdenum nitride, located between the active zone and the metallization layer. Further, a method for producing such a device is provided.

A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.

A display device includes a scan write line configured to receive a scan write signal, a scan initialization line configured to receive a scan initialization signal, a sweep signal line configured to receive a sweep signal, a first data line configured to receive a first data voltage, a second data line configured to receive a second data voltage, and a subpixel connected to the scan write line, the scan initialization line, the sweep signal line, the first data line, and the second data line. The subpixel includes a light-emitting element, a first pixel driver including a first transistor configured to generate a control current according to the first data voltage of the first data line, and a second pixel driver including an eighth transistor configured to generate a driving current applied to the light-emitting element according to the second data voltage.

A display device includes a substrate including a pad area, a first conductive pattern disposed in the pad area on the substrate, an insulating layer disposed on the first conductive pattern and overlapping the first conductive pattern, second conductive patterns disposed on the insulating layer, spaced apart from each other, and contacting the first conductive pattern through contact holes formed in the insulating layer, and a third conductive pattern disposed on the second conductive patterns and contacting the insulating layer.

A display panel and a manufacturing method thereof, and an electronic terminal are provided and including a driving circuit layer, a planarization layer, an electrode layer, and a light-emitting layer which are stacked from bottom to top. The driving circuit layer includes driving circuits. The planarization layer includes first planarization portions and second planarization portions which are arranged in a same layer. The electrode layer includes electrode groups. The light-emitting layer includes light-emitting devices. The first planarization portion is disposed on a side of the driving circuit close to the electrode layer, and the second planarization portion is disposed on a side of one of the electrode group close to the driving circuit layer. A thickness of the second planarization portion is greater than a thickness of the first planarization portion.

A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.

A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.

A chip package includes a semiconductor structure and a redistribution layer. The semiconductor structure has a substrate, a first isolation layer, and a lower ground pad. The substrate has a top surface, a bottom surface opposite to the top surface, a through hole through the top surface and the bottom surface, and a sidewall surrounding the through hole. The first isolation layer is located on the top surface of the substrate, and the lower ground pad is located in the through hole. The redistribution layer extends from the bottom surface of the substrate to the lower ground pad along the sidewall. The redistribution layer covers the entire bottom surface of the substrate and electrically connects the lower ground pad.

A display device includes a scan write line configured to receive a scan write signal, a scan initialization line configured to receive a scan initialization signal, a sweep signal line configured to receive a sweep signal, a first data line configured to receive a first data voltage, a second data line configured to receive a second data voltage, and a subpixel connected to the scan write line, the scan initialization line, the sweep signal line, the first data line, and the second data line. The subpixel includes a light-emitting element, a first pixel driver including a first transistor configured to generate a control current according to the first data voltage of the first data line, and a second pixel driver including an eighth transistor configured to generate a driving current applied to the light-emitting element according to the second data voltage.