A method for producing a connection between component parts and a component made of component parts are disclosed. In an embodiment, a includes providing a first component part having a first exposed insulation layer and a second component part having a second exposed insulation layer, wherein each of the insulation layers has at least one opening, joining together the first and second component parts such that the opening of the first insulation layer and the opening of the second insulation layer overlap in top view, wherein an Au layer and a Sn layer are arranged one above the other in at least one of the openings and melting the Au layer and the Sn layer to form an AuSn alloy, wherein the AuSn alloy forms a through-via after cooling electrically conductively connecting the first component part to the second component part.

Devices and techniques including process steps make use of recesses in conductive interconnect structures to form reliable low temperature metallic bonds. A fill layer is deposited into the recesses prior to bonding. First conductive interconnect structures are bonded at ambient temperatures to second metallic interconnect structures using direct bonding techniques, with the fill layers in the recesses in one or both of the first and second interconnect structures.

Devices and techniques including process steps make use of recesses in conductive interconnect structures to form reliable low temperature metallic bonds. A fill layer is deposited into the recesses prior to bonding. First conductive interconnect structures are bonded at ambient temperatures to second metallic interconnect structures using direct bonding techniques, with the fill layers in the recesses in one or both of the first and second interconnect structures.

A wafer-level semiconductor die attachment method includes placing a semiconductor die of a plurality of semiconductor dies at an initial placement position to overlap a sub-mount pad on a sub-mount of a pre-singulated wafer. A die pad of the semiconductor die comes in contact with a solder layer deposited over the sub-mount pad. The semiconductor die and the sub-mount include a plurality of die and sub-mount mating features, respectively. The solder layer is heated locally to temporarily hold the semiconductor die at the initial placement position. The pre-singulated wafer is reflowed, when each semiconductor die is temporarily held at the corresponding initial placement position. During reflow, each semiconductor die slides from the initial placement position and a contact is established between the corresponding plurality of die and sub-mount mating features. Thereby, each semiconductor die is permanently attached to the corresponding sub-mount.

Devices and techniques including process steps make use of recesses in conductive interconnect structures to form reliable low temperature metallic bonds. A fill layer is deposited into the recesses prior to bonding. First conductive interconnect structures are bonded at ambient temperatures to second metallic interconnect structures using direct bonding techniques, with the fill layers in the recesses in one or both of the first and second interconnect structures.

Methods for manufacturing semiconductor light-emitting devices and semiconductor light-emitting devices having a high radiating performance and can include a metallic laminate substrate, a semiconductor light-emitting chip and a transparent resin. The metallic laminate substrate can include a cavity so as to be able to accurately mount the light-emitting chip, and also can structures to efficiently radiate heat generated from the light-emitting chip. The transparent resin to encapsulate the semiconductor light-emitting chip in the cavity can include various wavelength converting materials. Additionally, the light-emitting devices can be manufactured in manufacturing processes similar to conventional light-emitting devices. Thus, the disclosed subject matter can provide semiconductor light-emitting devices having a high radiating performance and a high alignment accuracy, which can emit various color lights including a substantially white color tone, and therefore can be used as a light source for lighting units such as a vehicle headlight, general light, a stage lighting, etc.

A manufacturing method for a micro light-emitting diode (LED) display panel includes: providing a base substrate carrying a plurality of LED dies, each LED die including a first semiconductor layer, a light-emitting material layer, a second semiconductor layer and a first conductive layer, the first semiconductor layer being bonded with the base substrate through a sacrificial layer, a material of the sacrificial layer being decomposable under laser irradiation; providing a backplane having a plurality of bonding structures; bonding at least some LED dies of the plurality of LED dies to at least some of the plurality of bonding structures through respective first conductive layers; and peeling each of the at least some LED dies from the base substrate through laser lift-off.

Devices and techniques including process steps make use of recesses in conductive interconnect structures to form reliable low temperature metallic bonds. A fill layer is deposited into the recesses prior to bonding. First conductive interconnect structures are bonded at ambient temperatures to second metallic interconnect structures using direct bonding techniques, with the fill layers in the recesses in one or both of the first and second interconnect structures.