Disclosed herein are microelectronic assemblies including microelectronic components that are coupled together by direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes at least part of an inductor.

A bonding method and a bonding structure are provided. A device substrate is provided including a plurality of semiconductor devices, wherein each of the semiconductor devices includes a first bonding layer. A cap substrate is provided including a plurality of cap structures, wherein each of the cap structures includes a second bonding layer, the second bonding layer having a planar surface and a first protrusion protruding from the planar surface. The device substrate is bonded to the cap substrate by engaging the first protrusion of the second bonding layer of each of the cap structures with the corresponding first bonding layer of each of the semiconductor devices in the device substrate.

Disclosed herein are microelectronic assemblies including microelectronic components that are coupled together by direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes at least part of an inductor.

Representative implementations of techniques, methods, and formulary provide repairs to processed semiconductor substrates, and associated devices, due to erosion or dishing of a surface of the substrates. The substrate surface is etched until a preselected portion of one or more embedded interconnect devices protrudes above the surface of the substrate. The interconnect devices are wet etched with a selective etchant, according to a formulary, for a preselected period of time or until the interconnect devices have a preselected height relative to the surface of the substrate. The formulary includes one or more oxidizing agents, one or more organic acids, and glycerol, where the one or more oxidizing agents and the one or more organic acids are each less than 2% of formulary and the glycerol is less than 10% of the formulary.

Representative implementations of techniques, methods, and formulary provide repairs to processed semiconductor substrates, and associated devices, due to erosion or dishing of a surface of the substrates. The substrate surface is etched until a preselected portion of one or more embedded interconnect devices protrudes above the surface of the substrate. The interconnect devices are wet etched with a selective etchant, according to a formulary, for a preselected period of time or until the interconnect devices have a preselected height relative to the surface of the substrate. The formulary includes one or more oxidizing agents, one or more organic acids, and glycerol, where the one or more oxidizing agents and the one or more organic acids are each less than 2% of formulary and the glycerol is less than 10% of the formulary.

A semiconductor device includes a plurality of semiconductor devices, a plurality of metal lines electrically connected to at least one of the semiconductor devices, and a protective layer on the metal lines. The protective layer includes a plurality of open areas partially exposing the metal lines and which serves as pads. A first pad includes a first area that extends from at least one of the metal lines and at least one second area around and separated from the first area.

A semiconductor package according to an embodiment includes a first semiconductor die including a back side bonding structure; and a second semiconductor die including a front side bonding structure bonded to the back side bonding structure, wherein the back side bonding structure includes a first dielectric layer; and first bonding pads passing through the first dielectric layer, the front side bonding structure includes a second dielectric layer bonded to the first dielectric layer; and second bonding pads with each second bonding pad bonded to a respective first bonding pad and passing through the second dielectric layer, and the first dielectric layer includes oblique edge portions around the first bonding pads at the surface facing the second dielectric layer.

A semiconductor device includes two integrated circuit (IC) chips. The first IC chip includes substrate, a spacer connected to the substrate and including holes, wherein at least one of the holes has a first shape, and solder bumps positioned in the holes, respectively. The second IC chip includes a substrate, electrode pads extending from the substrate and connected to the solder bumps, respectively. At least one of the electrode pads that corresponds to the at least one of the solder bumps has a second shape, and the first shape and the second shape are non-coextensive such that there is at least one gap between the first shape and the second shape when projected on each other.

A bonded structure and the method of forming the same are provided. The bonded structure includes a first wafer and a second wafer. The first wafer has a first bonding surface and a plurality of first bonding pads exposed from the first bonding surface. The second wafer has a second bonding surface and a plurality of second bonding pads exposed from the second bonding surface. The first bonding surface faces and contacts the second bonding surface, and the first bonding pads are in contact with and electrically connected to the second bonding pads. Each first bonding pad has a circular shape, and each second bonding pad has an oval shape.