Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (IC) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.

Systems and methods are provided for stacked semiconductor memory packages. Each package can include an integrated circuit (IC) package substrate capable of transmitting data to memory dies stacked within the package over two channels. Each channel can be located on one side of the IC package substrate, and signals from each channel can be routed to the memory dies from their respective sides.