A semiconductor device includes at least one transistor disposed on or in a substrate. The transistor is a bipolar transistor including an emitter, a base, and a collector, or a field-effect transistor including a source, a gate, and a drain. At least one first bump connected to the emitter or the source is disposed on the substrate. Furthermore, at least three second bumps connected to the collector or the drain are disposed on the substrate. In plan view, a geometric center of the at least one first bump is located inside a polygon whose vertices correspond to geometric centers of the at least three second bumps.

A semiconductor device includes a wiring substrate having a first surface, a stacked body on the first surface, the stacked body comprising a first chip, a second chip having a through via and positioned between the first chip and the first surface, and a third chip, a first resin contacting the first surface and the third chip, and a second resin sealing the stacked body. The first and second resins are made of different materials.

A method for forming a chip package structure is provided. The method includes bonding a chip to a first surface of a first substrate. The method includes forming a bump and a dummy bump over a second surface of the first substrate. The dummy bump is close to a first corner of the first substrate, and the dummy bump is wider than the bump. The method includes bonding the first substrate to a second substrate through the bump. The dummy bump is electrically insulated from the chip and the second substrate. The method includes forming a protective layer between the first substrate and the second substrate. The protective layer surrounds the dummy bump and the bump, and the protective layer is between the dummy bump and the second substrate.

A semiconductor die includes a substrate and an integrated circuit provided on the substrate and having contacts. An electrically conductive layer is provided on the integrated circuit and defines electrically conductive elements electrically connected to the contacts. Electrically conductive interconnects coupled with respective electrically conductive elements. The electrically conductive interconnects have at least one of different sizes or shapes from one another.

A semiconductor device includes a semiconductor substrate, a transistor, and a first harmonic termination circuit. The transistor is formed at the semiconductor substrate. The transistor amplifies an input signal supplied to an input end and outputs an amplified signal through an output end. The first harmonic termination circuit attenuates a harmonic component included in the amplified signal. The first harmonic termination circuit is formed at the semiconductor substrate such that one end of the first harmonic termination circuit is connected to the output end of the transistor and the other end of the first harmonic termination circuit is connected to a ground end of the transistor.

An optical module includes an optical semiconductor chip including a first electrode pad, a second electrode pad, and a third electrode pad arranged between the first electrode pad and the second electrode pad, a wiring substrate on which the optical semiconductor chip is flip-chip mounted, including a fourth electrode pad, a fifth electrode pad, and a sixth electrode pad arranged between the fourth electrode pad and the fifth electrode pad, a first conductive material connecting the first electrode pad with the fourth electrode pad, a second conductive material connecting the second electrode pad with the fifth electrode pad, a third conductive material arranged between the first conductive material and the second conductive material, connecting the third electrode pad with the sixth electrode pad, and a resin provided in an area on the second conductive material side of the third conductive material between the optical semiconductor chip and the wiring substrate.

An optical module includes an optical semiconductor chip including a first electrode pad, a second electrode pad, and a third electrode pad arranged between the first electrode pad and the second electrode pad, a wiring substrate on which the optical semiconductor chip is flip-chip mounted, including a fourth electrode pad, a fifth electrode pad, and a sixth electrode pad arranged between the fourth electrode pad and the fifth electrode pad, a first conductive material connecting the first electrode pad with the fourth electrode pad, a second conductive material connecting the second electrode pad with the fifth electrode pad, a third conductive material arranged between the first conductive material and the second conductive material, connecting the third electrode pad with the sixth electrode pad, and a resin provided in an area on the second conductive material side of the third conductive material between the optical semiconductor chip and the wiring substrate.

There is provided a method for manufacturing a semiconductor device comprising: forming a first organic insulating layer on a semiconductor region; forming a bump base film including an edge portion contacting with the first organic insulating layer; performing heat treatment of the bump base film; and forming a second organic insulating layer so as to cover the edge portion of the bump base film and the first organic insulating layer around the bump base film while contacting with the first organic insulating layer, the second organic insulating layer being provided with a first opening that exposes a surface of the bump base film.

A flip-chip wire bondless power device and method for using a two sided contact bare die power device as a single-connection-level power device. The device uses a top pad solder ball array for connecting a top pad electrically connected to the top contact of the bare die power device and a bottom pad solder ball array for connecting a bottom pad that is electrically through an electrically conductive bottom pad connector that is electrically connected to the bottom contact of the bare die power device using an electrically conductive die-attach material, the top pad and bottom pad, and thereby the top pad solder ball array and the bottom pad solder ball array are planar for flip chip mounting. A trench can be formed between the top pad and bottom pad for isolation and insulation purposes. A method of assembling a flip-chip wire bondless power device is also provided.

According to example configurations herein, an apparatus comprises a die and a host substrate. The die can include a first transistor and a second transistor. A surface of the die includes multiple conductive elements disposed thereon. The multiple conductive elements on the surface are electrically coupled to respective nodes of the first transistor and the second transistor. Prior to assembly, the first transistor and second transistor are electrically isolated from each other. During assembly, the surface of the die including the respective conductive elements is mounted on a facing of the host substrate. Accordingly, a die including multiple independent transistors can be flipped and mounted to a respective host substrate such as printed circuit board, lead frame, etc.