A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes first and second package components stacked upon and electrically connected to each other. The first package component includes first and second conductive bumps, the second package component includes third and fourth conductive bumps, and dimensions of the first and second conductive bumps are less than those of the third and fourth conductive bumps. The semiconductor package includes a first joint structure partially wrapping the first conductive bump and the third conductive bump, and a second joint structure partially wrapping the second conductive bump and the fourth conductive bump. A curvature of the first joint structure is different from a curvature of the second joint structure.

A printed structure comprises a device comprising device electrical contacts disposed on a common side of the device and a substrate non-native to the device comprising substrate electrical contacts disposed on a surface of the substrate. At least one of the substrate electrical contacts has a rounded shape. The device electrical contacts are in physical and electrical contact with corresponding substrate electrical contacts. The substrate electrical contacts can comprise a polymer core coated with a patterned contact electrical conductor on a surface of the polymer core. A method of making polymer cores comprising patterning a polymer on the substrate and reflowing the patterned polymer to form one or more rounded shapes of the polymer and coating and then patterning the one or more rounded shapes with a conductive material.

A semiconductor device package includes a semiconductor device, a non-semiconductor substrate over the semiconductor device, and a first connection element extending from the semiconductor device to the non-semiconductor substrate and electrically connecting the semiconductor device to the non-semiconductor substrate.

A semiconductor package includes a first substrate having a first surface and including a first electrode, a first bump pad located on the first surface of the first substrate and connected to the first electrode, a second substrate having a second surface facing the first surface of the first substrate and including a second electrode, a second bump pad and neighboring second bump pads on the second surface of the second substrate, and a bump structure. The second bump pad has a recess structure. That is recessed from a side surface of the second bump pad toward a center thereof. The second bump pad may be connected to the second electrode. A bump structure may contact the first bump pad and the second bump pad. The bump structure may have a portion protruding through the recess structure. The neighboring second bump pads may neighbor the second bump pad and include recess structures oriented in different directions.

A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad with a first bonding surface positioned away from the stack structure, and a second bonding pad; a carrier comprising a connecting surface; a third bonding pad which comprises a second bonding surface and is arranged on the connecting surface, and a fourth bonding pad arranged on the connecting surface of the carrier; and a conductive connecting layer comprising a first conductive part, comprising a first outer contour, and formed between and directly contacting the first bonding pad and the third bonding pad; a second conductive part formed between the second bonding pad and the fourth bonding pad; and a blocking part covering the first conductive part to form a covering area, wherein the first bonding surface comprises a first position which is the closest to the carrier within the covering area and a second position which is the farthest from the carrier within the covering area in a cross section view, and a distance from the first position to the first out contour is greater than that from the second position to the first outer contour.

An electronic device structure includes a substrate having a substrate first major surface, an opposing substrate second major surface, and a first conductive pattern adjacent to the substrate first major surface. A first electronic component is coupled to the substate and includes a first component first side and a first device structure adjacent to the first component first side. A second electronic component is adjacent to the substate second major surface and includes a second component first side and a second device structure adjacent to the second component first side. A third electronic component is coupled to the substrate. The first electronic component is generally orthogonal to the substrate and the first device structure is oriented in a first direction, and the second device structure is oriented in a second direction different than the first direction.

A three-dimensional (3D) image sensor includes a first substrate having an upper pixel. The upper pixel includes a photoelectric element and first and second photogates connected to the photoelectric element. A second substrate includes a lower pixel, which corresponds to the upper pixel, that is spaced apart from the first substrate in a vertical direction. The lower pixel includes a first transfer transistor that transmits a first signal provided by the first photogate. A first source follower generates a first output signal in accordance with the first signal. A second transfer transistor transmits a second signal provided by the second photogate. A second source follower generates a second output signal in accordance with the second signal. First and second bonding conductors are disposed between the first and second substrates and electrically connect the upper and lower pixels.

A semiconductor device includes a first semiconductor element, a first connection terminal formed on a lower surface of the first semiconductor element, a second semiconductor element mounted on the lower surface of the first semiconductor element so that the second semiconductor element partially overlaps the first semiconductor element in plan view, a second connection terminal formed on a lower surface of the second semiconductor element, and a wiring substrate on which the first and second semiconductor elements are mounted. The wiring substrate includes first and second connection pads electrically connected to the first connection terminal and the second connection terminal, respectively. The semiconductor device further includes a third connection terminal formed on the first connection pad and electrically connected to the first connection terminal. One of the first connection terminal and the third connection terminal is a metal post, and the other is a solder ball.

A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes first and second package components stacked upon and electrically connected to each other. The first package component includes first and second conductive bumps, the second package component includes third and fourth conductive bumps, and dimensions of the first and second conductive bumps are less than those of the third and fourth conductive bumps. The semiconductor package includes a first joint structure partially wrapping the first conductive bump and the third conductive bump, and a second joint structure partially wrapping the second conductive bump and the fourth conductive bump. A curvature of the first joint structure is different from a curvature of the second joint structure.

A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad with a first bonding surface positioned away from the stack structure, and a second bonding pad; a carrier comprising a connecting surface; a third bonding pad which comprises a second bonding surface and is arranged on the connecting surface, and a fourth bonding pad arranged on the connecting surface of the carrier; and a conductive connecting layer comprising a first conductive part, comprising a first outer contour, and formed between and directly contacting the first bonding pad and the third bonding pad; a second conductive part formed between the second bonding pad and the fourth bonding pad; and a blocking part covering the first conductive part to form a covering area, wherein the first bonding surface comprises a first position which is the closest to the carrier within the covering area and a second position which is the farthest from the carrier within the covering area in a cross section view, and a distance from the first position to the first out contour is greater than that from the second position to the first outer contour.