Patent classifications
H01L2224/16141
SEMICONDUCTOR DEVICE WITH MODIFIED CURRENT DISTRIBUTION
Semiconductor devices having modified current distribution and methods of forming the same are described herein. As an example, a memory die in contact with a logic die can be configured to draw a sum amount of current from a current source. The memory die can include a plurality of through-substrate vias (TSVs) formed in the memory die and configured to provide the sum amount of current to the memory die from the current source. The memory die can include at least two interconnection contacts associated with a first TSV closer to the current source that are not connected. The memory die can include an electrical connection between at least two interconnection contacts associated with a second TSV that is further in distance from the current source than the first TSV.
Semiconductor Package
A semiconductor device is disclosed. The semiconductor device comprises a first die, a second die, and a redistribution structure. The first die and the second die are electrically connected to the redistribution structure. There are no solder bumps between the first die and the redistribution structure. There are no solder bumps between the second die and the redistribution structure. The first die and the second die have a shift with regard to each other from a top view.
DIRECT DIE-TWO-DIE CONNECTION THROUGH AN INTERPOSER WITHOUT VIAS
A semiconductor package comprises an interposer with at least one open area through the interposer. A first die is connected to a first side of the interposer. A second die is connected to a second side of the interposer. At least one metal pillar is connected to the first die that extends through the open area of the interposer and connects to the second die to provide a direct die-to-die connection through the interposer.
Semiconductor device with modified current distribution
Semiconductor devices having modified current distribution and methods of forming the same are described herein. As an example, a memory die in contact with a logic die can be configured to draw a sum amount of current from a current source. The memory die can include a plurality of through-substrate vias (TSVs) formed in the memory die and configured to provide the sum amount of current to the memory die from the current source. The memory die can include at least two interconnection contacts associated with a first TSV closer to the current source that are not connected. The memory die can include an electrical connection between at least two interconnection contacts associated with a second TSV that is further in distance from the current source than the first TSV.