The present invention discloses a welding method of a demetallized ceramic substrate having a surface capillary microgroove structure. The demetallized ceramic substrate includes a ceramic substrate main body and surface capillary microstructures. The surface capillary microstructures are arranged on two lateral sides of the ceramic substrate main body and the surface capillary microstructures specifically are capillary microgrooves. The welding method includes the following steps: fixing a chip to an upper surface of the demetallized ceramic substrate having the surface capillary microgroove structure, fixing the ceramic substrate with the chip to a printed circuit board having a bonding pad, and placing melted solder on the bonding pad, and driving the solder to ascend to an electrode of the chip from the bonding pad in a lower layer by means of a capillary force, thereby realizing an electrical connection between the chip and the printed circuit board.

A stacked semiconductor structure is provided. The stacked semiconductor structure includes a substrate, a first electronic component, a first fillet, and a first redistribution layer. The substrate has a support surface. The substrate includes a first pad disposed on the support surface. The first electronic component is disposed on the support surface and has a first bottom surface, a first top surface, and a first side surface connecting the first bottom surface and the first top surface. The first electronic component includes a second pad disposed on the first top surface. The first fillet is disposed on the support surface and the first side surface and has a first inclined surface. The first redistribution layer is disposed on the support surface, the first top surface, and the first inclined surface and electrically connecting the first pad to the second pad.

In one embodiment, a semiconductor package includes a semiconductor die having conductive pads. A lead frame is directly connected to the conductive pads using an electrochemically formed layer or a conductive adhesive layer thereby facilitating an electrical connection between the conductive pads of the semiconductor die and the lead frame without using separate wire bonds or conductive bumps.

A semiconductor package that includes a first redistribution substrate including a first surface and a second surface facing the first surface; a semiconductor chip on the first surface; an electronic element on the second surface; and an underfill pattern between the electronic element and the second surface. The first redistribution substrate includes a first insulating layer, and an insulating pattern and a dam structure both on the first insulating layer. The dam structure is spaced apart from the electronic element in a first direction parallel to the second surface. The insulating pattern includes an insulating material different from that of the first insulating layer. The insulating pattern is in contact with the first insulating layer and the underfill pattern.