A display device may include a conductive pattern disposed on a substrate. A passivation layer may be disposed on the conductive pattern. A first shielding electrode and a second shielding electrode that may be disposed on the passivation layer may be spaced apart from each other. A first electrode may be disposed on the first shielding electrode. A second electrode may be disposed on the second shielding electrode. A light emitting element may be electrically connected between the first electrode and the second electrode. A first distance between the first shielding electrode and the second shielding electrode may be less than a second distance between the first electrode and the second electrode.

A display device includes a first electrode, second electrodes, light emitting elements, a bank layer, and connection electrodes. Each of the second electrodes comprises an electrode stem part overlapping the bank layer and electrode branch parts branching from the electrode stem part and disposed partially in an emission area, and the connection electrodes comprise a first connection electrode disposed on the first electrode, overlapping an upper bank part of the bank layer and having a part disposed in a first sub-area, a second connection electrode disposed on a first electrode branch part of one of the second electrodes, overlapping a lower bank part of the bank layer and having a part disposed in a second sub-area, and a third connection electrode disposed on second electrode branch parts of different second electrodes of the second electrodes and on the first electrode and surrounding a part of the first connection electrode.

A display device and a method of manufacturing the display device are disclosed. A display device includes a substrate, a plurality of first lines disposed on the substrate and spaced apart from each other, a plurality of second lines disposed on the substrate and disposed between the plurality of respective first lines, a plurality of light emitting elements disposed on the plurality of first lines and the plurality of second lines, and a plurality of third lines disposed on the plurality of light emitting elements. Each of the plurality of light emitting elements includes a first semiconductor layer overlapping the plurality of first lines and electrically connected to the plurality of first lines and the plurality of second lines, a light emitting layer, a second semiconductor layer, a conductor layer in contact with the plurality of third lines, and a non-conductor layer overlapping the plurality of second lines.

A display device includes a display panel including a display area having pixels, and a non-display area surrounding the display area, and having a pad portion at one side, the display area including a first sub-display area overlapping the pad portion in a second direction, and a second sub-display area at one side of the first sub-display area, and including a data line, the first sub-display area including a data line, a first gate line on one side of some of the pixels, a first connection line located on one side of others of the pixels, and a second connection line connected to the first connection line, and extending to the second sub-display area in a first direction crossing the second direction, and wherein the data line is electrically connected to the pad portion through the first connection line and the second connection line.

A light emitting element includes a first semiconductor layer; an emission layer disposed on the first semiconductor layer; a second semiconductor layer disposed on the emission layer; an electrode layer disposed on the second semiconductor layer; and an insulating film surrounding side surfaces of the first semiconductor layer, the emission layer, and the second semiconductor layer and surrounding a portion of the electrode layer at an end portion of the light emitting element on which the electrode layer is disposed. The electrode layer includes a first surface adjacent to the second semiconductor layer; a second surface facing the first surface and having a width less than a width of the first surface; and a side surface that connects the first surface and the second surface and has a slope in a range of about 75° to about 90° with respect to the first surface of the electrode layer.

A pixel may include a first line component, a second line component, a third line component, and a fourth line component that are spaced apart from each other on a substrate and extend in a direction, a conductive pattern disposed on the first and the second line components, a passivation layer disposed on the conductive pattern, a first electrode disposed on the passivation layer and directly contacting the conductive pattern, a second electrode disposed adjacent to the first electrode and spaced apart from the first electrode, and a third electrode disposed adjacent to the second electrode, and spaced apart from the second electrode, and electrically connected to the third line component, a first pixel electrode and a second pixel electrode that are disposed on the first to the third electrodes and spaced apart from each other, and light emitting elements electrically connected to the first and the second pixel electrodes.

A display device includes a printed circuit board attached to a side of a substrate, a frame facing the printed circuit board, a cover layer disposed between the substrate and the frame and overlapping the printed circuit board in a plan view, and a first reflective layer disposed on a surface of the frame and disposed between the frame and the cover layer.

A display device includes: a substrate having an emission area and a non-emission area; a first bank in the non-emission area of the substrate and having an opening; electrodes on the first bank and spaced apart from each other; a second bank on the electrodes; and light emitting elements on the second bank between the electrodes. The second bank has a first area overlapping the light emitting elements and a second area in the opening in the first bank.

A fan-out semiconductor package includes a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole of the first interconnection member and having an active surface having connection pads disposed thereon and an inactive surface opposite the active surface; an encapsulant encapsulating at least some portions of the first interconnection member and the semiconductor chip; and a second interconnection member disposed on the first interconnection member and the semiconductor chip. The first interconnection member and the second interconnection member respectively include a plurality of redistribution layers electrically connected to the connection pads of the semiconductor chip, and the semiconductor chip has a groove defined in the active surface and between a peripheral edge of the semiconductor chip and the connection pads of the semiconductor chip.

A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole of the first interconnection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first interconnection member and the semiconductor chip; a second interconnection member disposed on the first interconnection member and the semiconductor chip; and connection terminals disposed on the second interconnection member. The first interconnection member and the second interconnection member respectively include redistribution layers electrically connected to the connection pads of the semiconductor chip, and a connection pad and a connection terminal are electrically connected to each other by a pathway passing through the redistribution layer of the first interconnection member.