Patent classifications
H01L2224/37011
Wiring member and semiconductor module including same
In a wiring member, an element connection portion, a plate connection portion, and an upper surface portion are at height positions different from one another. The element connection portion has a through hole, and the plate connection portion has a through hole and a chamfer. The upper surface portion which is not connected to another portion, has projections asymmetrically disposed on both side surfaces thereof. Owing to these features, the type, the orientation, and the front and the back of the wiring member can be easily distinguished. Accordingly, it is possible to prevent incorrect assembling of the wiring member in a semiconductor module.
Power Module with Press-Fit Contacts
A method of forming a semiconductor device includes providing a power electronics carrier including a structured metallization layer disposed on an electrically insulating substrate, mounting one or more semiconductor dies on a portion of the structured metallization layer, forming an encapsulant body of electrically insulating material that covers the power electronics carrier and encapsulates the one or more semiconductor dies, securing a press-fit connector to the power electronics carrier with a base portion of the press-fit connector being disposed within an opening in the encapsulant body and with an interfacing end of the press-fit connector being electrically accessible from outside the encapsulant body.
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MODULE USING SAME
This semiconductor device includes: a plate-shaped heat dissipation plate; a plurality of switching elements joined to one surface of the heat dissipation plate; a first terminal located apart from the heat dissipation plate, extending in a direction away from the heat dissipation plate, and connected via first conductors to surfaces of the switching elements on a side opposite to the heat dissipation plate side; and a sealing member sealing the switching elements, the heat dissipation plate, and the first terminal. A cutout is provided at an outer periphery of the heat dissipation plate. A part of the first terminal on the heat dissipation plate side overlaps a cut-out area at the cutout as seen in a direction perpendicular to the one surface of the heat dissipation plate. A retracted portion retracted inward is formed at an outer periphery of another surface of the heat dissipation plate.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device includes: a semiconductor element that includes an element main body having an element main surface facing one side in a thickness direction, and a first electrode arranged on the element main surface; a first insulating layer that is arranged over a peripheral edge portion of the first electrode and the element main surface and includes a first annular portion formed in an annular shape when viewed in the thickness direction; and a second insulating layer that is laminated on the first insulating layer, is made of a resin material, and includes a second annular portion overlapping with the first annular portion when viewed in the thickness direction.
POWER SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING POWER SEMICONDUCTOR DEVICE, AND POWER CONVERSION APPARATUS
A semiconductor element is bonded to a circuit pattern integrated with an insulating layer and a heat radiation fin, a case is bonded to a peripheral edge of the heat radiation fin so as to surround the semiconductor element, the circuit pattern, and the insulating layer, and a sealing resin is sealed in a region surrounded by the insulating layer, the circuit pattern, and the case. An internal electrode includes a flat plate-shaped portion, and is provided with a through hole and a pair of bent and inclined-shaped support portions. The support portion is bonded to the circuit pattern, and the upper surface of the semiconductor element, the through hole, and an embossed portion provided around the through hole are bonded. The internal electrode, and an external electrode integrally molded with the case, are bonded.
Low stress asymmetric dual side module
Implementations of semiconductor packages may include a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the lead frame.
CONNECTING STRIP FOR DISCRETE AND POWER ELECTRONIC DEVICES
A connecting strip of conductive elastic material having an arched shape having a concave side and a convex side. The connecting strip is fixed at the ends to a support carrying a die with the convex side facing the support. During bonding, the connecting strip undergoes elastic deformation and presses against the die, thus electrically connecting the at least one die to the support.
Method for Welding an Attachment Piece to a Semiconductor Metallisation by Laser Welding
Various teachings of the present disclosure include a method for welding an attachment piece to a semiconductor metallization using laser welding. The method may include: arranging an attachment piece having a flat side with a thin point so the flat side faces the semiconductor metallization; and welding the flat side to the semiconductor metallization. The flat side rests against a flat side of the semiconductor metallization over an entire surface area of the flat side. The thin point is formed with a cup shape of the attachment piece. The cup shape is open in the direction away from the semiconductor metallization.
Additive manufacturing of a frontside or backside interconnect of a semiconductor die
A method for fabricating a semiconductor die package includes: providing a semiconductor transistor die, the semiconductor transistor die having a first contact pad on a first lower main face and/or a second contact pad on an upper main face; fabricating a frontside electrical conductor onto the second contact pad and a backside electrical conductor onto the first contact pad; and applying an encapsulant covering the semiconductor die and at least a portion of the electrical conductor, wherein the frontside electrical conductor and/or the backside electrical conductor is fabricated by laser-assisted structuring of a metallic structure.
Semiconductor device having multiple contact clips
A semiconductor device includes a device carrier, a first semiconductor chip mounted on the device carrier and a second semiconductor chip mounted on the device carrier. Further, the semiconductor device includes a first contact clip bonded to a first electrode of the first semiconductor chip, a second contact clip bonded to a first electrode of the second semiconductor chip and an insulating connector configured to hold the first contact clip and the second contact clip together.