Patent classifications
H01L2224/37011
Electronic module with press hole to expose surface of a conductor
An electronic module has a sealing part 90; electronic elements 15, 25 provided in the sealing part 90; rear surface-exposed conductors 10, 20, 30 having rear surface-exposed parts whose rear surface are exposed from the sealing part 90, and having one-terminal parts 11, 21, 31, which extend from the rear surface-exposed parts 12, 22, 32 and protrude outwardly from a side of the sealing part 90; and rear surface-unexposed conductors 40, 50 having unexposed parts 42, 52, which are sealed in the sealing part 90, and having other-terminal parts 41, 51, which extend from the unexposed parts 42, 52 and protrude outwardly from a side of the sealing part 90. The electronic elements 15, 25 are placed on the rear surface-exposed parts 12, 22, 32. The other-terminal parts 41, 51 have a width narrower than a width of the one-terminal parts 11, 21, 31.
SEMICONDUCTOR MODULE
In an embodiment, a semiconductor module includes a low side switch and a high side switch. The low side switch and the high side switch are arranged laterally adjacent one another and coupled in series between a ground package pad and a voltage input (VIN) package pad of the semiconductor module and form a half bridge configuration having an output node. The semiconductor module further includes a first capacitor pad coupled to ground potential and a second capacitor pad coupled to a VIN potential. The first capacitor pad is arranged vertically above the low side switch and the second capacitor pad is arranged vertically above the high side switch.
PACKAGE STRUCTURE FOR POWER SEMICONDUCTOR DEVICES WITH IMPROVED PARASITIC PARAMETERS
A package structure for a power semiconductor device is provided, including: a substrate; two or more semiconductor dies on the substrate, each of the semiconductor dies includes a first power switching pad, a second power switching pad and a gate; a gate control conductive trace, a first power switching contact and a second power switching contact are further arranged on the substrate, the gate control conductive trace is connected to each of the semiconductor dies via a bonding component, and the bonding component connecting a first semiconductor die to the gate control conductive trace is sandwiched between circuit lines formed by connecting the second power switching pads of the first semiconductor die and the neighboring second semiconductor die, to second power switching contact of the substrate.
SEMICONDUCTOR DIE PACKAGE
A semiconductor die package includes a semiconductor transistor die having a contact pad on an upper main face. The semiconductor die package also includes an electrical conductor disposed on the contact pad and fabricated by laser-assisted structuring of a metallic material, and an encapsulant covering the semiconductor die and at least a portion of the electrical conductor.
Power electronics assembly having a gate drive device disposed between a plurality of transistors
Methods, apparatuses and systems to provide for technology to that includes a plurality of transistors including first transistors and second transistors. The first transistors are disposed opposite the second transistors in a lateral direction with a first space between the first transistors and the second transistors in the lateral direction. A gate driver is electrically connected to the plurality of transistors to operate the plurality of transistors. The gate driver has a first portion disposed between the first transistors and the second transistors in the first space.
LOW STRESS ASYMMETRIC DUAL SIDE MODULE
Implementations of semiconductor packages may include a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the lead frame.
SEMICONDUCTOR DEVICE
A semiconductor device includes a first die pad having a first obverse face oriented in a thickness direction, a semiconductor element having an electrode located on a side to which the first obverse face is oriented in the thickness direction, the semiconductor element being connected to the first obverse face, a conductive material electrically connected to the electrode, and a first bonding layer electrically connecting the conductive material and the electrode. The conductive material includes a main portion, a first connecting portion electrically connected to the electrode via the first bonding layer, a first joint portion connecting the main portion and the first connecting portion, and a distal end portion spaced apart from the first joint portion, and connected to the first connecting portion. As viewed along an in-plane direction of the first obverse face, the distal end portion is inclined so as to be farther from the electrode, in a direction away from the first connecting portion. As viewed along the thickness direction, the electrode includes an expanded region, protruding from the conductive material to an opposite side of the first connecting portion in the in-plane direction, with respect to the distal end portion.
SEMICONDUCTOR DEVICE
A semiconductor device includes two first switching elements mounted on a first die pad. Each of the two first switching elements includes a first control electrode connected to a first control lead by a first control connection member. The first control connection member includes a lead connector connected to the first control lead and electrode connectors connected between the lead connector and the first control electrodes of the first switching elements. The electrode connectors are equal in length. Thus, the connection members between the first control lead and the first control electrodes of the first switching elements are equal in length.
LOW STRESS ASYMMETRIC DUAL SIDE MODULE
Implementations of semiconductor packages may include a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the lead frame.
Metal clip with solder volume balancing reservoir
A semiconductor device includes a semiconductor die attached to a substrate and a metal clip attached to a side of the semiconductor die facing away from the substrate by a soldered joint. The metal clip has a plurality of slots dimensioned so as to take up at least 10% of a solder paste reflowed to form the soldered joint. Corresponding methods of production are also described.