Implementations of semiconductor packages may include: a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include two or more spacers coupled to the first side of the first substrate and a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the two or more spacers.

A packaged electronic device includes a substrate comprising a die pad and a lead spaced apart from the die. An electronic device is attached to the die pad top side. A conductive clip is connected to the substrate and the electronic device, and the conductive clip comprises a plate portion attached to the device top side with a conductive material, a clip connecting portion connected to the plate portion and the lead, and channels disposed to extend inward from a lower side of the plate portion above the device top side. The conductive material is disposed within the channels. In another example, the plate portion comprises a lower side having a first sloped profile in a first cross-sectional view such that an outer section of the first sloped profile towards a first edge portion of the plate portion is spaced away from the electronic device further than an inner section of the first sloped profile towards a central portion of the plate portion. Other examples and related methods are also disclosed herein.

A semiconductor device including a substrate; a chip on which a surface electrode is formed; and a lead. The lead includes a first electrode connecting portion disposed on the surface electrode and electrically connected to the surface electrode of the chip via a conductive bonding material; a second electrode connecting portion electrically connected to an electrode portion of a wiring pattern. A lead connected to the first electrode connecting portion and the second electrode connecting portion. The lead further has a thermal shrinking stress equalizing structure on a portion of an outer periphery of the first electrode connecting portion. The lead is configured to make a thermal shrinking stress applied to a conductive bonding material between the first electrode connecting portion and the surface electrode equal.

A semiconductor device includes: a seal portion; an electronic element disposed within the seal portion; a first lead terminal; a second lead terminal having one end that is disposed to be close to the one end of the first lead terminal within the seal portion, and another end that is exposed from the seal portion; a first connecting element disposed within the seal portion, and having one end that is electrically connected to a control electrode of the electronic element, and another end that is electrically connected to the one end of the second lead terminal; a first conductive bonding agent for joining together the control electrode of the electronic element and the one end of the first connecting element in a conductive manner; and a second conductive bonding agent.

A package structure includes a first insulation layer, a first redistribution structure, at least one electronic component, a second redistribution structure, a second insulation layer, a first heat spreader, a heat dissipation substrate, a second heat spreader and plural thermal conduction structures. A part of the second redistribution structure is disposed on a part of a top surface of the first insulation layer, and the other part of the second redistribution is located in the first insulation layer. At least one of the conducting terminals is connected with the second redistribution structure. At least one of the thermal conduction structures is connected with at least one of the first redistribution structure and the second redistribution structure, and the thermal conduction structures are respectively extended outwardly from the opposite sides of the first insulation layer to form pins.

A packaged electronic device includes a substrate comprising a die pad and a lead spaced apart from the die. An electronic device is attached to the die pad top side. A conductive clip is connected to the substrate and the electronic device, and the conductive clip comprises a plate portion attached to the device top side with a conductive material, a clip connecting portion connected to the plate portion and the lead, and channels disposed to extend inward from a lower side of the plate portion above the device top side. The conductive material is disposed within the channels. In another example, the plate portion comprises a lower side having a first sloped profile in a first cross-sectional view such that an outer section of the first sloped profile towards a first edge portion of the plate portion is spaced away from the electronic device further than an inner section of the first sloped profile towards a central portion of the plate portion. Other examples and related methods are also disclosed herein.

A method of manufacturing packages is disclosed. In one example, the method comprises providing an electrically conductive sheet being continuous at least in a mounting region, mounting first main surfaces of a plurality of electronic components on the continuous mounting region of the sheet and forming interconnect structures for electrically coupling second main surfaces of the electronic components with the sheet. The second main surfaces oppose the first main surfaces. After the forming, structuring the sheet.

A semiconductor device includes: a carrier having a die pad and a contact; a semiconductor die having opposing first and second main sides and being attached to the die pad by a first solder joint such that the second main side faces the die pad; and a contact clip having a first contact region and a second contact region. The first contact is attached to the first main side by a second solder joint. The second contact region is attached to the contact by a third solder joint. The first contact region has a convex shape facing towards the first main side such that a distance between the first main side and the first contact region increases from a base of the convex shape towards an edge of the first contact region. The base runs along a line that is substantially perpendicular to a longitudinal axis of the contact clip.

A semiconductor chip (2a) is bonded to an upper surface of the conductive substrate (1a). A control terminal (11a) is disposed outside the semiconductor chip (2a) and connected to a control electrode of the semiconductor chip (2a) via a lead (12a). A case (10) surrounds the semiconductor chip (2a). A sealing material (13) seals the semiconductor chip (2a). The lead frame (4) includes a bonded part (4a) joined to the semiconductor chip (2a), and an upright part (4b) embedded in the case (10), extending from the bonded part (4a) to an outer side of the control terminal (11a), and standing upright vertically relative to an upper surface of the semiconductor chip (2a).

An electronic module has a first electronic element 13, a first connector 60 provided in one side of the first electronic element 13, and having a first columnar part 62 extending to another side and a first groove part 64 provided in a one-side surface, and a second electronic element 23 provided in one side of the first connector 60 via a conductive adhesive agent provided inside a circumference of the first groove part 64. The first connector 60 has a first concave part 67 on one side at a position corresponding to the first columnar part 62.