Patent classifications
H01L2224/451
Hybrid system including photonic and electronic integrated circuits and cooling plate
Techniques disclosed herein relate generally to integrating photonic integrated circuits and electronic integrated circuits in a same package. A device includes a semiconductor substrate and a die stack on the semiconductor substrate. The die stack includes a photonic integrated circuit (PIC) die and an electronic integrated circuit (EIC) die. The PIC die includes a PIC substrate and a photonic integrated circuit formed on the PIC substrate. The EIC die includes an EIC substrate and an electronic integrated circuit formed on the EIC substrate. The EIC die and the PIC die are bonded such that the PIC substrate and the EIC substrate are disposed on opposing sides of the die stack. The PIC substrate is bonded to the semiconductor substrate. The device also includes a cooling plate bonded to the EIC substrate.
Hybrid system including photonic and electronic integrated circuits and cooling plate
Techniques disclosed herein relate generally to integrating photonic integrated circuits and electronic integrated circuits in a same package. A device includes a semiconductor substrate and a die stack on the semiconductor substrate. The die stack includes a photonic integrated circuit (PIC) die and an electronic integrated circuit (EIC) die. The PIC die includes a PIC substrate and a photonic integrated circuit formed on the PIC substrate. The EIC die includes an EIC substrate and an electronic integrated circuit formed on the EIC substrate. The EIC die and the PIC die are bonded such that the PIC substrate and the EIC substrate are disposed on opposing sides of the die stack. The PIC substrate is bonded to the semiconductor substrate. The device also includes a cooling plate bonded to the EIC substrate.
CURABLE HEAT RADIATION COMPOSITION
The present invention relates to a curable heat radiation composition which includes two types of fillers with different compressive breaking strengths (except when the two types of fillers are the same substance) and a thermosetting resin, the compressive breaking strength ratio of the two types of fillers [compressive breaking strength of a filler (A) with a higher compressive breaking strength/compressive breaking strength of a filler (B) with a lower compressive breaking strength] being 5 to 1,500, the compressive breaking strength of the filler (A) being 100 to 1,500 MPa, and the compressive breaking strength of the filler (B) being 1.0 to 20 MPa, an adhesive sheet using the composition and a method for producing the same. An aluminum nitride is preferable as the filler (A) and hexagonal boron nitride agglomerated particles are preferable as the filler (B).
CURABLE HEAT RADIATION COMPOSITION
The present invention relates to a curable heat radiation composition which includes two types of fillers with different compressive breaking strengths (except when the two types of fillers are the same substance) and a thermosetting resin, the compressive breaking strength ratio of the two types of fillers [compressive breaking strength of a filler (A) with a higher compressive breaking strength/compressive breaking strength of a filler (B) with a lower compressive breaking strength] being 5 to 1,500, the compressive breaking strength of the filler (A) being 100 to 1,500 MPa, and the compressive breaking strength of the filler (B) being 1.0 to 20 MPa, an adhesive sheet using the composition and a method for producing the same. An aluminum nitride is preferable as the filler (A) and hexagonal boron nitride agglomerated particles are preferable as the filler (B).
Semiconductor package with embedded die and its methods of fabrication
Embodiments of the present invention describe a semiconductor package having an embedded die. The semiconductor package comprises a coreless substrate that contains the embedded die. The semiconductor package provides die stacking or package stacking capabilities. Furthermore, embodiments of the present invention describe a method of fabricating the semiconductor package that minimizes assembly costs.
Semiconductor package with embedded die and its methods of fabrication
Embodiments of the present invention describe a semiconductor package having an embedded die. The semiconductor package comprises a coreless substrate that contains the embedded die. The semiconductor package provides die stacking or package stacking capabilities. Furthermore, embodiments of the present invention describe a method of fabricating the semiconductor package that minimizes assembly costs.
WIRE BONDING APPARATUS, METHOD FOR MEASURING OPENING AMOUNT OF CLAMP APPARATUS, AND METHOD FOR CALIBRATING CLAMP APPARATUS
A wire bonding apparatus of an aspect includes: a clamp apparatus, having a pair of arms; a stage, moving the clamp apparatus in a horizontal direction; a rod member; a contact detection part, detecting contact between the rod member and the clamp apparatus; and a control apparatus, controlling opening and closing of the pair of arms and an operation of the stage and acquiring position information of the clamp apparatus. The control apparatus obtains an opening amount of the pair of arms based on position information of the clamp apparatus at a time when an outer side surface of a first arm contacts the rod member in a state where the pair of arms are closed and position information of the clamp apparatus at the time when the outer side surface of the first arm contacts the rod member in a state where the pair of arms are open.
WIRE BONDING APPARATUS, METHOD FOR MEASURING OPENING AMOUNT OF CLAMP APPARATUS, AND METHOD FOR CALIBRATING CLAMP APPARATUS
A wire bonding apparatus of an aspect includes: a clamp apparatus, having a pair of arms; a stage, moving the clamp apparatus in a horizontal direction; a rod member; a contact detection part, detecting contact between the rod member and the clamp apparatus; and a control apparatus, controlling opening and closing of the pair of arms and an operation of the stage and acquiring position information of the clamp apparatus. The control apparatus obtains an opening amount of the pair of arms based on position information of the clamp apparatus at a time when an outer side surface of a first arm contacts the rod member in a state where the pair of arms are closed and position information of the clamp apparatus at the time when the outer side surface of the first arm contacts the rod member in a state where the pair of arms are open.
METHOD TO CONNECT POWER TERMINAL TO SUBSTRATE WITHIN SEMICONDUCTOR PACKAGE
A method to connect power terminals to substrates within semiconductor packages is disclosed. The power terminal connection method minimally adapts the power terminal so that laser treatment can be used to connect the power terminal to the substrate. The power terminal may be adapted in a variety of ways, such that an interface between the power terminal and the substrate may be transformed (melted with consecutive rapid solidification) by the laser device, allowing the power terminal to be connected to the substrate.
METHOD TO CONNECT POWER TERMINAL TO SUBSTRATE WITHIN SEMICONDUCTOR PACKAGE
A method to connect power terminals to substrates within semiconductor packages is disclosed. The power terminal connection method minimally adapts the power terminal so that laser treatment can be used to connect the power terminal to the substrate. The power terminal may be adapted in a variety of ways, such that an interface between the power terminal and the substrate may be transformed (melted with consecutive rapid solidification) by the laser device, allowing the power terminal to be connected to the substrate.