A copper wire having a diameter of 10 to 80 m is provided. The copper wire bulk material is 99.99 wt.-% pure copper or a copper alloy consisting of 10 to 1000 wt.-ppm of silver and/or of 0.1 to 3 wt.-% of palladium with copper as the remainder to make up 100 wt.-%, and the copper wire has a 0.5 to <6 nm thin circumferential surface layer of copper oxide.

A copper wire having a diameter of 10 to 80 m is provided. The copper wire bulk material is 99.99 wt.-% pure copper or a copper alloy consisting of 10 to 1000 wt.-ppm of silver and/or of 0.1 to 3 wt.-% of palladium with copper as the remainder to make up 100 wt.-%, and the copper wire has a 0.5 to <6 nm thin circumferential surface layer of copper oxide.

A method including: attaching a plurality of conductive tracks to at least one surface of a substrate, depositing a coating comprising at least one halo-hydrocarbon polymer on the at least one surface of the substrate, and soldering through the coating.

A method including: attaching a plurality of conductive tracks to at least one surface of a substrate, depositing a coating comprising at least one halo-hydrocarbon polymer on the at least one surface of the substrate, and soldering through the coating.

A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.

A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.

An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.

An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.