A light emitting device includes a first metal plate, a second metal plate, and light emitting elements between the metal plates. The device further includes a wavelength conversion member excited by a first light from the light emitting elements to emit a second light having a wavelength different from the first light, a bulb including a base, a first lead connected to the first metal plate, and a second lead connected to the second metal plate. The base of the bulb includes terminals connected to respective leads. The conversion member covers the light emitting elements entirely, opposite surfaces of the first metal plate partially, and opposite surfaces of the second metal plate partially. The first lead is connected to a portion of the first metal plate exposed from the conversion member, and the second lead is connected to a portion of the second metal plate exposed from the conversion member.

A memory device comprising a programmable command-and-address (CA) interface and/or a programmable data interface is described. In an operational mode, two or more CA interfaces may be active. In another operational mode, at least one, but not all, CA interfaces may be active. In an operational mode, all of the data interfaces may be active. In another operational mode, at least one, but not all, data interfaces may be active. The memory device can include circuitry to select: an operational mode; a sub-mode within an operational mode; one or more CA interfaces as the active CA interface(s); a main CA interface from multiple active CA interfaces; and/or one or more data interfaces as the active data interfaces. The circuitry may perform these selection(s) based on one or more bits in one or more registers and/or one or more signals received on one or more pins.

A memory device comprising a programmable command-and-address (CA) interface and/or a programmable data interface is described. In an operational mode, two or more CA interfaces may be active. In another operational mode, at least one, but not all, CA interfaces may be active. In an operational mode, all of the data interfaces may be active. In another operational mode, at least one, but not all, data interfaces may be active. The memory device can include circuitry to select: an operational mode; a sub-mode within an operational mode; one or more CA interfaces as the active CA interface(s); a main CA interface from multiple active CA interfaces; and/or one or more data interfaces as the active data interfaces. The circuitry may perform these selection(s) based on one or more bits in one or more registers and/or one or more signals received on one or more pins.

A light emitting device includes: a base member including: a first lead, a second lead, and resin member supporting the first lead and the second lead, wherein each of a surface of the first lead that includes a first surface, a surface of the second lead, and a surface of the resin member that includes a second surface are positioned at an upper surface of the base member; a light emitting element located at the surface of the first lead; a resin frame located at the upper surface of the base member, where the first surface and at least a portion of the second surface are exposed inward of the resin frame; and a reflective member covering at least a portion of the second surface. Projections are located on the upper surface of the resin member that forms a portion of the upper surface of the base member.

In some embodiments, the present disclosure relates to a method of forming a package assembly. A wet etch stop layer is formed over a frontside of a semiconductor substrate. A sacrificial semiconductor layer is formed over the wet etch stop layer, and a dry etch stop layer is formed over the sacrificial semiconductor layer. A stack of semiconductor device layers may be formed over the dry etch stop layer. A bonding process is performed to bond the stack of semiconductor device layers to a frontside of an integrated circuit die, wherein the frontside of the semiconductor substrate faces the frontside of the integrated circuit die. A wet etching process is performed to remove the semiconductor substrate, and a dry etching process is performed to remove the wet etch stop layer and the sacrificial semiconductor layer.

The present technology relates to a substrate, a manufacturing method, and an electronic apparatus which enable prevention of damage to a semiconductor component. The substrate includes a second region that is disposed inside a first region in which a semiconductor component is arranged and that is surrounded by a connection part and a slit, the connection part having a spot facing on a side of a surface on which the semiconductor component is arranged. The present technology is applicable to manufacturing of electronic apparatuses such as a package substrate on which a semiconductor component that is an image sensor or the like is mounted, a digital camera equipped with a semiconductor component for capturing images by receiving the light, and a mobile phone having an image capturing function.

A light emitting device including a board, light emitting elements, a wavelength conversion member, and first and second metal plates. The board has a first surface and an opposite second surface, and is longer in a first direction than in a second direction perpendicular to the first direction. The light emitting elements are mounted on the first surface and are arrayed in a row along the first direction. The wavelength conversion member includes a first portion covering the light emitting elements and a second portion covering the second surface. The light emitting elements includes a first light emitting element located closest to the first metal plate, and a second light emitting element located closest to the second metal plate. The light emitting elements on the first surface are located between a first end surface of the first metal plate and a first end surface of the second metal plate.

This semiconductor laser device comprises: a semiconductor laser element; a switching element connected in series to the semiconductor laser element, the switching element having a gate electrode, a drain electrode, and a source electrode; capacitors connected in parallel to the semiconductor laser element and the switching element; first drive electroconductive parts to which first terminals of the capacitors are connected; a second drive electroconductive part positioned apart from the first drive electroconductive parts; first drive connection members that connect the first drive electroconductive parts and the source electrode; and a second drive connection member that connects the second drive electroconductive part and the source electrode.

According to one embodiment, a semiconductor package includes a semiconductor chip, a sealing resin that has a flat plate shape and seals the semiconductor chip inside, a first electrode that includes a first mounting surface exposed on a first main face of the sealing resin, a second electrode that includes a second mounting surface exposed on the first main face, and a groove provided on the first main face. The first mounting surface includes a first end portion arranged in an inner region of the first main face and opposed to the second electrode. The groove includes a first connection portion connected to the first end portion, and a second connection portion connected to a lateral face of the sealing resin.

A semiconductor device includes a semiconductor chip, first and second source terminals and a Kelvin terminal, wherein the semiconductor chip includes a first source electrode coupled to the first source terminal through a first connecting portion, a second source electrode coupled to the second source terminal through a second connecting portion, a Kelvin pad coupled to the Kelvin terminal and formed independently of the first source electrode, a power MOSFET that has a source coupled to the first source electrode, a sense MOSFET that has a source coupled to the second source electrode, a source pad formed on a portion of the first source electrode and coupled to the first connecting portion, a plurality of source potential extraction ports formed around a connection point between the first connecting portion and the source pad and a plurality of wires coupled between the source potential extraction ports and the Kelvin pad.