PoP devices and methods of forming the same are disclosed. A PoP device includes a first package structure and a second package structure. The first package structure includes a first chip, and a plurality of active through integrated fan-out vias and a plurality of dummy through integrated fan-out vias aside the first chip. The second package structure includes a plurality active bumps bonded to the plurality of active through integrated fan-out vias, and a plurality of dummy bumps bonded to the plurality of dummy through integrated fan-out vias. Besides, a total number of the active through integrated fan-out vias and the dummy through integrated fan-out vias at a first side of the first chip is substantially the same as a total number of the active through integrated fan-out vias and the dummy through integrated fan-out vias at a second side of the first chip.

Semiconductor chip package device and semiconductor chip package method are provided. The semiconductor chip package device includes: a lead frame, chips, an encapsulating layer, and an electroplating layer. The lead frame includes a first surface, a second surface, first grooves, second grooves, and third grooves. The first grooves are connected to the second grooves to form through holes and the third grooves disposed at ends of the lead frame. The chips are electrically connected to the lead frame. The encapsulating layer is formed by using an encapsulating material to encapsulate the chips and at least a portion of the lead frame. The first grooves are filled with the encapsulating material. The electroplating layer is disposed on the second surface of the lead frame, and extends into the third grooves or into the third grooves and the second grooves.

According to an embodiment of the present disclosure, a method for manufacturing an integrated circuit (IC) device may include mounting an IC chip onto a center support structure of a leadframe. The leadframe may include: a plurality of pins extending from the center support structure; a groove running perpendicular to the individual pins of the plurality of pins around the center support structure; and a bar connecting the plurality of pins remote from the center support structure. The method may further include: bonding the IC chip to at least some of the plurality of pins; encapsulating the leadframe and bonded IC chip, including filling the groove with encapsulation compound; removing the encapsulation compound from the groove, thereby exposing at least a portion of the individual pins of the plurality of pins; plating the exposed portion of the plurality of pins; and cutting the IC package free from the bar by sawing through the encapsulated lead frame along the groove using a first saw width less than a width of the groove.

An integrated circuit (IC) device includes a pressure sensor die, a flexible gel covering a least a pressure-sensing region of the die, and a flexible diaphragm covering the gel. The IC device has encapsulant and a lid that define a cavity above the diaphragm. The lid has an aperture that enables proximate ambient air pressure outside the device to be sensed by the pressure-sensing region through the flexible diaphragm and the flexible gel. The diaphragm protects the gel material from potentially harmful ambient materials. The diaphragm may be a part of the lid.

The present invention relates to a curable heat radiation composition which includes two types of fillers with different compressive breaking strengths (except when the two types of fillers are the same substance) and a thermosetting resin, the compressive breaking strength ratio of the two types of fillers [compressive breaking strength of a filler (A) with a higher compressive breaking strength/compressive breaking strength of a filler (B) with a lower compressive breaking strength] being 5 to 1,500, the compressive breaking strength of the filler (A) being 100 to 1,500 MPa, and the compressive breaking strength of the filler (B) being 1.0 to 20 MPa, an adhesive sheet using the composition and a method for producing the same. An aluminum nitride is preferable as the filler (A) and hexagonal boron nitride agglomerated particles are preferable as the filler (B).

Discussed generally herein are methods and devices including or providing an electromagnetic interference (EMI) shielding. A device can include substrate including electrical connection circuitry therein, ground circuitry on, or at least partially in the substrate, the ground circuitry at least partially exposed by a surface of the substrate, a die electrically connected to the connection circuitry and the ground circuitry, the die on the substrate, a conductive material on a die backside, and a conductive paste or one or more wires electrically connected to the ground circuitry and the conductive material.

A method of manufacturing a semiconductor device includes: providing, on a substrate, a first magnetic substrate including a base, a first side wall portion and a second side wall portion at opposed ends of the base, the sidewall portions extending from the base, providing a semiconductor chip over the base at a location between the first side wall portion and the second side wall portion, providing a plate-like magnetic substrate having a second surface, the second surface provided with a resin thereon, and positioning the plate-like magnetic substrate having a second surface with the resin thereon such that the second surface faces the base of the first magnetic substrate. Then the plate like magnetic substrate is moved in the direction of the first magnetic substrate to contact the second surface of the plate like magnetic substrate with the first side wall portion and the second side wall portion.

An electro-optic device includes a chip provided with a mirror and a drive element adapted to drive the mirror, a light-transmitting cover adapted to cover the mirror in a planar view, and a spacer having contact with one surface of the chip between the cover and the chip. The entire part of one surface of the chip having contact with the spacer is made of a first material such as silicon oxide film having first thermal conductivity, and the spacer is made of a second material such as a quartz crystal having second thermal conductivity higher than the first thermal conductivity. The cover is made of a third material such as sapphire having third thermal conductivity higher than the second thermal conductivity.

Provided is an electronic package, including: a carrier, an electronic component disposed on the carrier, and an antenna structure, wherein the antenna structure has a plurality of spacing members and at least one wire connected among the spacing members. No additional layout area is required to be formed on a surface of the carrier, such that the objective of miniaturization can be achieved.

A highly-reliable semiconductor device has improved adhesion between a sealing material and a sealed metal member and/or a case member. In some implementations, the semiconductor device includes: a laminated substrate on which a semiconductor element is mounted; and a sealing material. In some implementations, the sealing material contains an epoxy base resin, a curing agent, and a phosphonic acid.