A semiconductor device (100) comprises a main body portion (50), a semiconductor element (51), a sealing portion (60) and a first lead (10). The first lead (10) has a first base end portion (11) provided along the first direction, a protruding portion (12) protruding from the first base end portion (11) in a second direction different and having a positioning hole (13) formed therein, and a first tip end portion (17) provided in the first base end portion (11) via a bent portion (15). A slit (14) is formed in the protruding portion (12), and a positioning hole side end portion (13a) on the first base end portion (11) side of the positioning hole (13) is positioned on or more on the side opposite to the bent portion (15) than a straight line extending along the first direction from a bent-portion-side slit side end portion (14a) of the slit (14).

A semiconductor device assembly can include an assembly substrate having a top surface with a die stack thereat. The die stack can include a first and a second die, and each dies can include a die substrate with a top and a bottom surface. The top surface can include a first region a first distance from the bottom surface, and a second region a second distance, greater than the first distance, from the bottom surface and with a bond pad thereat. The bottom surface of the first die can bond with the top surface of the assembly substrate, and the bottom surface of the second die can bond with the first region of the first die top surface. In some embodiments, the assembly can further include additional die stacks and/or additional dies within one or more die stacks.

A semiconductor package may include a lower structure, a first semiconductor chip on the lower structure, the first semiconductor chip including a hot spot, a second semiconductor chip horizontally spaced apart from the first semiconductor chip on the lower structure, and a connection chip in the lower structure and connecting the first and second semiconductor chips to each other. The hot spot may vertically overlap the connection chip.

A wafer-on-wafer formed memory and logic device can enable high bandwidth transmission of data directly between a memory die and a logic die. A logic die that is bonded to a memory die via a wafer-on-wafer bonding process can receive signals indicative of a genetic sequence from the memory die and through a wafer-on-wafer bond. The logic die can also perform a genome annotation lotic operation to attach biological information to the genetic sequence. An annotated genetic sequence can be provided as an output.

An integrated circuit package includes at least one electronic chip having a first face fastened onto a first face of a carrier substrate by an adhesive interface. The adhesive interface includes a crown formed of a first adhesive material that is fastened on the periphery of the first face of the electronic chip. The crown defining an internal housing. A second adhesive material, different than the first material, is deposited in the internal housing.

A semiconductor device assembly is provided. The assembly includes an outer semiconductor device which has an active surface and a back surface. The back surface includes a cut that extends to a depth between the active surface and the back surface, and uncut regions on opposing sides of the cut. The assembly further includes an inner semiconductor device disposed within the cut of the outer semiconductor device.

A semiconductor device includes a base member having a first surface and a second surface on a side opposite to the first surface, the base member including at least one interconnect extending in a first direction along the first surface; two or more stacked bodies arranged in the first direction on the first surface, each of the two or more stacked bodies including semiconductor chips stacked in a second direction perpendicular to the first surface; and logic chips electrically connected respectively to the stacked bodies. Each of semiconductor chips includes first and second semiconductor layers. The first and second semiconductor layers each have an element surface and a back surface. An active element is provided on the element surface. The first semiconductor layer and the second semiconductor layer are bonded such that the element surface of the second semiconductor layer faces the element surface of the first semiconductor layer.

The invention provides a joining film that can enhance the mechanical strength and thermal cycle characteristics in a semiconductor device produced by joining a semiconductor element and a substrate, and a tape for wafer processing.

Disclosed is a joining film 13 for joining a semiconductor element 2 and a substrate 40, the joining film having an electroconductive joining layer 13a having a reinforcing layer formed from a porous body or a reticulate body, the pores or meshes of the porous body or the reticulate body being filled with an electroconductive paste containing metal fine particles (p).

A package structure includes a first substrate, a second substrate, a chip, a first wire and a second wire. The first substrate includes a top surface, a bottom surface, a window and a first conductive pad. The bottom surface of the first substrate is opposite to the top surface. The window communicates the top surface and the bottom surface. The first conductive pad is located over the bottom surface. The second substrate is located over the first substrate. The second substrate is spaced from the first substrate and includes a second conductive pad facing the top surface of the first substrate and exposed from the window. The chip is located over the second substrate. The first wire connects the first conductive pad to the second conductive pad. The second wire connects the second conductive pad to the third conductive pad.

A chip package for optical sensing includes a substrate, and a semiconductor device positioned on the substrate and coupled to the substrate through a first conducting element. Two molding processes are applied, to form a first colloid body on the substrate so as to cover the semiconductor device and, on the first colloid body, to form a second colloid body which covers an optical device. The optical device is electrically connected to the substrate through a second conducting element. The light transmittance of the second colloid body exceeds that of the first colloid body.