The present disclosure discloses a trench Insulated Gate Bipolar Transistor (IGBT) packaging structure and a method for manufacturing the trench Insulated Gate Bipolar Transistor packaging structure. The trench IGBT packaging structure includes: a trench IGBT, which includes an emitting electrode metal layer, and a trench gate electrode; a lead frame, which includes a chip placement area and an emitting electrode lead-out end; a first bonding wire connecting the emitting electrode metal layer and an emitting electrode pin. One end of the first bonding wire is connected to a surface, away from the trench gate electrode, of the emitting electrode metal layer to form a strip-shaped first solder joint, the other end is connected to the emitting electrode lead-out end to form a second solder joint, and an extension direction of the first solder joint is perpendicular to an extension direction of the trench of the trench gate electrode.

A semiconductor device includes a conductive support member with first and second die pads, a first semiconductor element on the first die pad, a second semiconductor element on the second die pad for forming a first output-side circuit, and a sealing resin. The first semiconductor element includes a circuit part forming an input-side circuit, and an insulating part that transmits a signal between the input-side and the first output-side circuits, while providing electrical insulation between the input-side and the first output-side circuits. The sealing resin includes first and second side faces spaced apart in an x direction and a third side face perpendicular to a y direction. The conductive support member includes input-side terminals protruding from the first side face and first output-side terminals protruding from the second side face. The conductive support member is not exposed on the third side face.

The present invention includes a method for creating a system in a package with integrated lumped element devices and active devices on a single chip/substrate for heterogeneous integration system-on-chip (HiSoC) in photo-definable glass, comprising: masking a design layout comprising one or more electrical passive and active components on or in a photosensitive glass substrate; activating the photosensitive glass substrate, heating and cooling to make the crystalline material to form a glass-crystalline substrate; etching the glass-crystalline substrate; and depositing, growing, or selectively etching a seed layer on a surface of the glass-crystalline substrate on the surface of the photodefinable glass.

A semiconductor device includes a semiconductor chip having an electrode pad, a terminal having a terminal pad, and a bonding wire. The bonding wire includes a first end portion, a first bonded portion bonded to the electrode pad, a loop portion extending between the semiconductor chip and the terminal, and a second bonded portion bonded to the terminal pad. The second bonded portion is a wedge bonded portion comprising a second end portion of the bonding wire opposite to the first end portion. A length of the first bonded portion in the first direction is greater than a length of the second bonded portion in the first direction.

Disclosed are a semiconductor device and a stacked semiconductor package. The semiconductor device may include a semiconductor chip and a plurality of chip pads disposed on the semiconductor chip in a second horizontal direction perpendicular to a first horizontal direction. The plurality of chip pads may include: a first chip pad connected to a wire extending in the first horizontal direction, when seen from the top; and a second chip pad connected to a diagonal wire extending in a direction at an angle to the first and second horizontal directions, when seen from the top. The width of the first chip pad in the second horizontal direction may be smaller than the width of the second chip pad in the second horizontal direction.

A capillary for performing ball bonding includes a body defining a lumen, a first blade defined in a lower tip of the body, and a second blade defined in the lower tip of the body for increasing reliability of a ball bonding procedure performed using the capillary.

The present disclosure relates to an imaging element package, a method of manufacturing the same, and an electronic device capable of further improving reliability. An imaging element package includes a solid-state imaging element having a first pad, a substrate on which the solid-state imaging element is mounted, the substrate having a second pad, and a wire wiring that connects the first pad and the second pad. The wire wiring has a ball portion bonded to the first pad in a shape having a thickness equal to or larger than a depth of an opening portion provided for opening the first pad, and a crescent portion provided by pressing an end of the metal wire against the ball portion and bonding the end to the ball portion, and connected to the metal wire with a connection length of a predetermined ratio or more with respect to the metal wire.

A performance of a semiconductor device is improved. The semiconductor device according to one embodiment includes a wire that is bonded to one bonding surface at a plurality of parts in an opening formed in an insulating film of a semiconductor chip. The semiconductor device includes also a sealer that seals the semiconductor chip and the wire so that the sealer is in contact with the bonding surface. An area of a part of the bonding surface, the part not overlapping the wire, is small.

A semiconductor device A1 includes a substrate 3, a conductive section 5 formed on the substrate 3 and including a conductive material, a lead 1A located on the substrate 3, a semiconductor chip 4A located on the lead 1A, a control chip 4G located on the substrate 3 and electrically connected to the conductive section 5 and the semiconductor chip 4A for controlling an operation of the semiconductor chip 4A, and a resin 7 covering the semiconductor chip 4A, the control chip 4G, at least a part of the substrate 3 and a part of the lead 1A. This configuration contributes to achieving a higher level of integration of the semiconductor device.

According to one embodiment, a semiconductor device includes a first electrode, a second electrode, and a wire extending between the first electrode and the second electrode. The wire includes a first conductor in contact with the first electrode and the second electrode, and a second conductor that is provided inside the first conductor and has no contact with the first electrode and the second electrode.