H01L2224/48456

WIRE BONDING BETWEEN ISOLATION CAPACITORS FOR MULTICHIP MODULES

A packaged multichip device includes a first IC die with an isolation capacitor utilizing a top metal layer as its top plate and a lower metal layer as its bottom plate. A second IC die has a second isolation capacitor utilizing its top metal layer as its top plate and a lower metal layer as its bottom plate. A first bondwire end is coupled to one top plate and a second bondwire end is coupled to the other top plate. The second bondwire end includes a stitch bond including a wire approach angle not normal to the top plate it is bonded to and is placed so that the stitch bond's center is positioned at least 5% further from an edge of this top plate on a bondwire crossover side compared to a distance of the stitch bond's center from the side opposite the bondwire crossover side.

Power enhanced stacked chip scale package solution with integrated die attach film
11894344 · 2024-02-06 · ·

An apparatus comprising: a die stack comprising at least one die pair, the at least one die pair having a first die over a second die, the first die and the second die both having a first surface and a second surface, the second surface of the first die over the first surface of the second die; and an adhesive film between the first die and the second die of the at least one die pair; wherein the adhesive film comprises an insulating layer and a conductive layer, the insulating layer adhering to the second surface of the first die and the conductive layer adhering to the first surface of the second die.

DOUBLE STITCH WIREBONDS

In some examples, a semiconductor package comprises an electrically conductive surface and a bond wire coupled to the electrically conductive surface. The bond wire includes a first stitch bond coupled to the electrically conductive surface, and a second stitch bond contiguous with the first stitch bond and coupled to the electrically conductive surface. The second stitch bond is partially, but not completely, overlapping with the first stitch bond.

RIBBON BONDING TOOLS AND METHODS OF USING THE SAME

A ribbon bonding tool including a body portion is provided. The body portion includes a tip portion. The tip portion includes a working surface between a front edge of the tip portion and a back edge of the tip portion. The working surface includes a region defining at least one of a plurality of recesses and a plurality of protrusions. The working surface also defines at least one of (a) a first planar portion between the region and the front edge of the tip portion, and (b) a second planar portion between the region and the back edge of the tip portion.

Ribbon bonding tools and methods of using the same

A ribbon bonding tool including a body portion is provided. The body portion includes a tip portion. The tip portion including a working surface, the tip portion including two side wall portions on either side of the working surface wherein a ribbon path is defined between the side wall portions.

Wire bonding between isolation capacitors for multichip modules

A packaged multichip device includes a first IC die with an isolation capacitor utilizing a top metal layer as its top plate and a lower metal layer as its bottom plate. A second IC die has a second isolation capacitor utilizing its top metal layer as its top plate and a lower metal layer as its bottom plate. A first bondwire end is coupled to one top plate and a second bondwire end is coupled to the other top plate. The second bondwire end includes a stitch bond including a wire approach angle not normal to the top plate it is bonded to and is placed so that the stitch bond's center is positioned at least 5% further from an edge of this top plate on a bondwire crossover side compared to a distance of the stitch bond's center from the side opposite the bondwire crossover side.

Wire bonding between isolation capacitors for multichip modules

A packaged multichip device includes a first IC die with an isolation capacitor utilizing a top metal layer as its top plate and a lower metal layer as its bottom plate. A second IC die has a second isolation capacitor utilizing its top metal layer as its top plate and a lower metal layer as its bottom plate. A first bondwire end is coupled to one top plate and a second bondwire end is coupled to the other top plate. The second bondwire end includes a stitch bond including a wire approach angle not normal to the top plate it is bonded to and is placed so that the stitch bond's center is positioned at least 5% further from an edge of this top plate on a bondwire crossover side compared to a distance of the stitch bond's center from the side opposite the bondwire crossover side.

WIRE BONDING BETWEEN ISOLATION CAPACITORS FOR MULTICHIP MODULES

A packaged multichip device includes a first IC die with an isolation capacitor utilizing a top metal layer as its top plate and a lower metal layer as its bottom plate. A second IC die has a second isolation capacitor utilizing its top metal layer as its top plate and a lower metal layer as its bottom plate. A first bondwire end is coupled to one top plate and a second bondwire end is coupled to the other top plate. The second bondwire end includes a stitch bond including a wire approach angle not normal to the top plate it is bonded to and is placed so that the stitch bond's center is positioned at least 5% further from an edge of this top plate on a bondwire crossover side compared to a distance of the stitch bond's center from the side opposite the bondwire crossover side.

WIRE BONDING BETWEEN ISOLATION CAPACITORS FOR MULTICHIP MODULES

A packaged multichip device includes a first IC die with an isolation capacitor utilizing a top metal layer as its top plate and a lower metal layer as its bottom plate. A second IC die has a second isolation capacitor utilizing its top metal layer as its top plate and a lower metal layer as its bottom plate. A first bondwire end is coupled to one top plate and a second bondwire end is coupled to the other top plate. The second bondwire end includes a stitch bond including a wire approach angle not normal to the top plate it is bonded to and is placed so that the stitch bond's center is positioned at least 5% further from an edge of this top plate on a bondwire crossover side compared to a distance of the stitch bond's center from the side opposite the bondwire crossover side.

CAPILLARY FOR STITCH BOND

An example semiconductor package comprises a semiconductor die having a top surface, a bond pad formed on the top surface, a bond wire having a first end and a second end, wherein the first end is attached to the bond pad. The semiconductor package having a contact pad, wherein the second end of the wire bond is attached to the contact pad by a stitch bond, the stitch bond having a plateau region formed between a cut end and a ramped portion, wherein a bottom surface of the plateau region forms an attachment to the contact pad.