A semiconductor package-on-package (PoP) device includes a first die incorporating a through-hole via (THV) disposed along a peripheral surface of the first die. The first die is disposed over a substrate or leadframe structure. A first semiconductor package is electrically connected to the THV of the first die, or electrically connected to the substrate or leadframe structure. An encapsulant is formed over a portion of the first die and the first semiconductor package.

Heat spreading substrate with embedded interconnects. In an embodiment in accordance with the present invention, an apparatus includes a metal parallelepiped comprising a plurality of wires inside the metal parallelepiped. The plurality of wires have a different grain structure than the metal parallelepiped. The plurality of wires are electrically isolated from the metal parallelepiped. The plurality of wires may be electrically isolated from one another.

Heat spreading substrate with embedded interconnects. In an embodiment in accordance with the present invention, an apparatus includes a metal parallelepiped comprising a plurality of wires inside the metal parallelepiped. The plurality of wires have a different grain structure than the metal parallelepiped. The plurality of wires are electrically isolated from the metal parallelepiped. The plurality of wires may be electrically isolated from one another.

In order to improve productivity of a semiconductor device, while improving stability of the blocking voltage of the semiconductor device, this semiconductor device is characterized by having a semiconductor element, and a laminated structure having three resin layers, said laminated structure being in a peripheral section surrounding a main electrode on one surface of the semiconductor element. The semiconductor device is also characterized in that the laminated structure has, on the center section side of the semiconductor element, a region where a lower resin layer is in contact with an intermediate resin layer, and a region where the lower resin layer is in contact with an upper resin layer.

A semiconductor module includes: semiconductor arrangements each including a first switching element having a first emitter terminal and a first collector terminal, a second switching element having a second emitter terminal and a second collector terminal, a first diode element having a first anode terminal and a first cathode terminal, and a second diode element having a second anode terminal and a second cathode terminal. A first conductor rail is electrically coupled to the first anode terminals and first emitter terminals. A second conductor rail is electrically coupled to the second anode terminals and the second emitter terminals. A third conductor rail is electrically coupled to the first anode terminals and first emitter terminals. A fourth conductor rail is electrically coupled to the second anode terminals and the second emitter terminals.

A terminal case formed by integrally molding a lead frame and a case that has internally an inner face on which the lead frame is mounted and has externally a step portion fixed to a circuit block having an insulating substrate and semiconductor chips formed on the insulating substrate. An opening portion is formed between the step portion and the inner face so as to extend through them, and the opening portion is filled with an adhesive to bond the insulating substrate to the step portion. Since a connecting area to which a bonding wire of the lead frame is ultrasonically bonded is fixed, it is possible to reduce the bonding failures of the lead frames.

A terminal case formed by integrally molding a lead frame and a case that has internally an inner face on which the lead frame is mounted and has externally a step portion fixed to a circuit block having an insulating substrate and semiconductor chips formed on the insulating substrate. An opening portion is formed between the step portion and the inner face so as to extend through them, and the opening portion is filled with an adhesive to bond the insulating substrate to the step portion. Since a connecting area to which a bonding wire of the lead frame is ultrasonically bonded is fixed, it is possible to reduce the bonding failures of the lead frames.

A half-bridge power semiconductor module includes an insulating wiring board including a positive-electrode wiring conductor, a bridge wiring conductor, and a negative-electrode wiring conductor arranged on or above a single insulating plate in such a way as to be electrically insulated from each other. The back-surface electrodes of a high-side power semiconductor device and a low-side power semiconductor device are joined to the front sides of the positive-electrode wiring conductor and the bridge wiring conductor. Front-surface electrodes of the high-side power semiconductor device and the low-side power semiconductor device are connected to the bridge wiring conductor and the negative-electrode wiring conductor by a plurality of bonding wires and a plurality of bonding wires.

A diode-laser bar assembly comprises a diode-laser bar mounted onto a cooler by way of an electrically-insulating submount. A laminated connector is provided that includes two electrically-conducting sheets bonded to opposite sides on an electrically-insulating sheet. An electrical insulator is located between the laminated connector and the cooler. One electrically-conducting sheet is connected to n-side of the diode-laser bar and the other electrically-conducting sheet is connected to p-side of the diode-laser bar.

A semiconductor device improved in deterioration detection accuracy by using an inductance of a bonding wire. The semiconductor device includes a first conductor pattern formed on the insulating substrate, the main current of the semiconductor die device flowing through the first conductor pattern; a second conductor pattern formed on the insulating substrate for sensing the potential of the surface electrode of the semiconductor die device; a first bonding wire for connecting the surface electrode and the first conductor pattern; and a second bonding wire. Further, there is a voltage sensing unit which is connected to the first conductor pattern and the second conductor pattern to sense a potential difference between the first conductor pattern and the second conductor pattern at the time of switching of the semiconductor die device; and a deterioration detection unit for detecting deterioration of the first bonding wire by using the sensed potential difference.