H01L2224/48476

Wire bonded electronic devices to round wire
09595501 · 2017-03-14 · ·

A disclosed circuit arrangement includes a flexible substrate. A layer of pressure sensitive adhesive (PSA) is directly adhered to a first major surface of the substrate. One or more metal foil pads and electrically conductive wire are attached directly on a surface of the PSA layer. The wire has a round cross-section and one or more portions directly connected to the one or more metal foil pads with one or more weld joints, respectively. An electronic device is attached directly on the surface of the layer of PSA and is electrically connected to the one or more portions of the round wire by one or more bond wires, respectively.

MICROELECTRONIC PACKAGE WITH HORIZONTAL AND VERTICAL INTERCONNECTIONS
20170069599 · 2017-03-09 · ·

In a microelectronic package, a first wire bond wire is coupled to an upper surface of a substrate. A first bond mass is coupled to another end of the first wire bond wire. A second wire bond wire is coupled to the upper surface. A second bond mass is coupled to another end of the second wire bond wire. The first and second wire bond wires laterally jut out horizontally away from the upper surface of the substrate for at least a distance of approximately 2 to 3 times a diameter of both the first wire bond wire and the second wire bond wire. The first wire bond wire and the second wire bond wire are horizontal for the distance with respect to being co-planar with the upper surface within +/10 degrees.

SEMICONDUCTOR PACKAGE
20250253285 · 2025-08-07 · ·

A semiconductor package may include a semiconductor die stack in a stepped pattern, an encapsulation layer sealing the semiconductor die stack and including a first surface coplanar with a bottommost surface of the semiconductor die stack and a second surface opposite the first surface, the second surface having a groove, a printed circuit board on the second surface of the encapsulation layer and including a conductive pad facing the second surface of the encapsulation layer, a conductive connector filling the groove, and a bonding wire group penetrating the conductive connector in a vertical direction and connecting the semiconductor die stack to the conductive pad of the printed circuit board. A width of the conductive connector in a lateral direction may be greater than or equal to a width of the conductive pad in the lateral direction.

Functional component, forming method thereof and electronic device

Functional component, forming method thereof and electronic device are provided. The functional component includes a packaging substrate and a connecting wire. The packaging substrate includes a through-hole wire-bonding area including a first insulating layer and a wire-bonding electrode sequentially formed on the substrate. The first insulating layer includes a first through hole, and the wire-bonding electrode covers the first through hole. In an area corresponding to the first through hole, the packaging substrate has wire-bonding bump electrodes on a side of the wire-bonding electrode away from the first insulating layer. The connecting wire includes a wire-bonding connection portion and a wire-bonding extension portion connected to the wire-bonding connection portion. The wire-bonding connection portion is fixedly connected to the wire-bonding electrode. The wire-bonding connection portion extends to cover at least a partial area of a side of at least one of the wire-bonding bump electrodes.

SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD FOR THE SAME
20250391806 · 2025-12-25 · ·

The present disclosure as at least one embodiment provides a semiconductor package including a semiconductor chip including a connection pad; a conductive pad disposed on the semiconductor chip and spaced apart from the semiconductor chip; a conductive wire in contact with each of the connection pad of the semiconductor chip and the conductive pad, and connecting the connection pad and the conductive pad; an encapsulant that encapsulates at least a portion of each of the semiconductor chip, the conductive pad, and the conductive wire; and a redistribution structure disposed on the encapsulant and including a via in contact with the conductive pad and a wiring layer connected to the via, wherein the diameter of the conductive pad is larger than each diameter of the conductive wire and the via.