Patent classifications
H01L2224/48507
Corrosion-resistant copper bonds to aluminum
A method for fabricating a semiconductor device is disclosed. A packaged semiconductor device is provided having copper ball bonds attached to aluminum pads. The packaged device is treated for at least one cycle at a temperature in the range from about 250 C. to 270 C. for a period of time in the range from about 20 s to 40 s.
BONDING WIRE FOR SEMICONDUCTOR DEVICE
A bonding wire for a semiconductor device includes a Cu alloy core material and a Pd coating layer formed on a surface thereof, and the boding wire contains one or more elements of As, Te, Sn, Sb, Bi and Se in a total amount of 0.1 to 100 ppm by mass. The bonding longevity of a ball bonded part can increase in a high-temperature and high-humidity environment, improving the bonding reliability. When the Cu alloy core material further contains one or more of Ni, Zn, Rh, In, Ir, Pt, Ga and Ge in an amount, for each, of 0.011 to 1.2% by mass, it is able to increase the reliability of a ball bonded part in a high-temperature environment of 170 C. or more. When an alloy skin layer containing Au and Pd is further formed on a surface of the Pd coating layer, wedge bondability improves.
BONDING WIRE FOR SEMICONDUCTOR DEVICE
The present invention provides a bonding wire which can satisfy bonding reliability, spring performance, and chip damage performance required in high-density packaging. A bonding wire contains one or more of In, Ga, and Cd for a total of 0.05 to 5 at %, and a balance being made up of Ag and incidental impurities.
SEMICONDUCTOR DEVICE WITH PROTECTIVE MATERIAL AND METHOD FOR ENCAPSULATING
A semiconductor device includes a plurality of wire bonds formed on a surface of the semiconductor device by bonding each of a plurality of copper wires onto corresponding ones of a plurality of aluminum pads; a protective material is applied around the plurality of wire bonds, the protective material having a first pH; and at least a portion of the semiconductor device and the protective material are encapsulated with an encapsulating material having a second pH, wherein the first pH of the protective material is for neutralizing the second pH of the encapsulating material around the plurality of wire bonds.
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
In a method of manufacturing a semiconductor device, a semiconductor chip has first and second pads, a passivation film formed such that respective parts of the first and second pads are exposed, a first surface-metal-layer provided on the part of the first pad and a part of the passivation film, and a second surface-metal-layer provided on the part of the second pad and another part of the passivation film. Respective wires are electrically connected to the first and second surface-metal-layers. The semiconductor chip and the respective wires are then sealed with a resin.
Semiconductor device and method of fabricating same
A semiconductor device includes, an alloy layer sandwiched between a first Ag layer formed on a mounting board or circuit board and a second Ag layer formed on a semiconductor element, wherein the alloy layer contains an intermetallic compound of Ag.sub.3Sn formed by Ag components of the first Ag layer and the second Ag layer and Sn, and wherein a plurality of wires containing Ag are arranged extended from an outside-facing periphery of the alloy layer.
Bonding wire for semiconductor devices
Bonding wire for semiconductor devices contains one or more of Be, B, P, Ca, Y, La, and Ce in a total of 0.031 at % to obtain a 0.180 at %, further contains one or more of In, Ga, and Cd in a total of 0.05 at % to 5.00 at %, and has a balance of Ag and unavoidable impurities. Due to this, it is possible to obtain a bonding wire for semiconductor devices sufficiently forming an intermetallic compound layer at a ball bond interface to secure the bond strength of the ball bond, not causing neck damage even in a low loop, having a good leaning characteristic, and having a good FAB shape.
Semiconductor package substrate with groove on die pad
A semiconductor package includes a metallic pad and leads spaced from the metallic pad by a gap, the metallic pad including a roughened surface. The semiconductor package further includes a semiconductor die including bond pads, and an adhesive between the roughened surface of the metallic pad and the semiconductor die, therein bonding the semiconductor die to the metallic pad, wherein the adhesive includes a resin. The metallic pad further includes a groove surrounding the semiconductor die on the roughened surface, the groove having a surface roughness less than a surface roughness of the roughened surface of the metallic pad.