Patent classifications
H01L2224/48992
Method for forming an electrical connection between an electronic chip and a carrier substrate and electronic device
An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.
FINGERPRINT SENSOR AND MANUFACTURING METHOD THEREOF
A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise an interconnection structure, for example a bond wire, at least a portion of which extends into a dielectric layer utilized to mount a plate, and/or that comprise an interconnection structure that extends upward from the semiconductor die at a location that is laterally offset from the plate.
SEMICONDUCTOR DEVICE
A semiconductor device 100 according to an embodiment including: a semiconductor element 2 placed on an insulating substrate 1 and having an electrode 21 on a surface 2a; a bonding wire 3 bonded to the electrode 21 and electrically coupling the semiconductor element 2; and a first resin material 4 covering a bonding portion 31 between the electrode 21 and the bonding wire 3, the bonding portion 31 includes a non-bonding region 32 where the electrode 21 and the bonding wire 3 are not bonded.
SEMICONDUCTOR DEVICE WITH PROTECTIVE MATERIAL AND METHOD FOR ENCAPSULATING
A semiconductor device includes a plurality of wire bonds formed on a surface of the semiconductor device by bonding each of a plurality of copper wires onto corresponding ones of a plurality of aluminum pads; a protective material is applied around the plurality of wire bonds, the protective material having a first pH; and at least a portion of the semiconductor device and the protective material are encapsulated with an encapsulating material having a second pH, wherein the first pH of the protective material is for neutralizing the second pH of the encapsulating material around the plurality of wire bonds.
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH FIXING FEATURE ON WHICH BONDING WIRE IS DISPOSED
The present disclosure provides a method of manufacturing a semiconductor device. The method includes providing a substrate. The method also includes attaching an electronic component to the substrate. The method further includes attaching a fixing feature to an upper surface of the electronic component. In addition, the method includes forming a bonding wire connecting the substrate and the electronic component. The bonding wire is at least partially disposed on the fixing feature.
METHOD FOR FORMING AN ELECTRICAL CONNECTION BETWEEN AN ELECTRONIC CHIP AND A CARRIER SUBSTRATE AND ELECTRONIC DEVICE
An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.
SEMICONDUCTOR DEVICE
A semiconductor device includes: a substrate; a device region provided on the substrate; a terminal covering the device region in a plan view; and at least three pseudo bumps densely arranged in a layout located at vertexes of a triangle in a plan view on the terminal, wherein a extra material is formed by bulging of a part of the terminal from a lower portion to a side portion of each of the three pseudo bumps, a pair of the extra materials of each of the pseudo bumps is formed on both sides of one side and the other side in a first direction of each of the pseudo bumps so as to have directivity along the first direction in a plan view, and the extra materials of the three pseudo bumps are arranged at intervals from each other along a second direction.
Semiconductor device with supporter against which bonding wire is disposed and method for preparing the same
A semiconductor device and method for manufacturing the same are provided. The semiconductor device includes a substrate, an electronic component, a bonding wire, and a supporter. The electronic component is disposed on the substrate. The bonding wire includes a first terminal connected to the electronic component and a second terminal connected to the substrate. The bonding wire is disposed against the supporter.
ENCAPSULATED SEMICONDUCTOR PACKAGES INCLUDING MULTIFUNCTIONAL INTERFACE MATERIAL (MIM) STRUCTURES
A semiconductor package includes a multifunctional interface material (MIM) structure provided on a stack of memory dies. The MIM structure includes an adhesive layer disposed directly over a top surface of the top memory die of the stack of memory dies. The MIM structure also includes a polymer layer disposed directly over the adhesive layer. The adhesive layer of the MIM structure receives and secures a portion of the wires of the semiconductor package that contact the top memory die to minimize undesirable movement and disconnection of the wires from the top memory die. The polymer layer of the MIM structure compresses the adhesive layer to aid in securing the wires within the adhesive layer. The polymer layer also protects the adhesive layer within the semiconductor package during operation.
SEMICONDUCTOR PACKAGE
A semiconductor package including a first semiconductor chip, which includes a first semiconductor board, a bonding pad on the first semiconductor board, and a protection layer covering an upper surface of the first semiconductor board and including a recessed region exposing at least a portion of an upper surface of the bonding pad therethrough, a second semiconductor chip including a second semiconductor board in direct contact with the protection layer, and a wire electrically connecting the first semiconductor chip and the second semiconductor chip and connected to the bonding pad may be provided.