A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.

A semiconductor package includes a package substrate having substrate pads spaced apart from each other in a first direction and an upper insulation layer on an upper surface of the package substrate, the upper insulation layer defining a recess that exposes the substrate pads; a dam structure extending on the upper insulation layer to surround the recess; semiconductor chips stacked on the upper insulation layer of the package substrate such that a first surface on which chip pads are formed faces upward, semiconductor chips spaced apart from the dam structure in a second direction perpendicular to the first direction; bonding wires connecting the substrate pads to the chip pads of the semiconductor chips; and an underfill member filling an interior of the recess to cover an end portion of each of the bonding wires and each of the substrate pads.

A method is for making a semiconductor device having an IC die on a substrate with electric contact formations for the IC die and the substrate. The method may include printing ink including electrically conductive nanoparticles, onto the electric contact formations.

A microelectronic package includes a substrate having a first surface. A microelectronic element overlies the first surface. Electrically conductive elements are exposed at the first surface of the substrate, at least some of which are electrically connected to the microelectronic element. The package includes wire bonds having bases bonded to respective ones of the conductive elements and ends remote from the substrate and remote from the bases. The ends of the wire bonds are defined on tips of the wire bonds, and the wire bonds define respective first diameters between the bases and the tips thereof. The tips have at least one dimension that is smaller than the respective first diameters of the wire bonds. A dielectric encapsulation layer covers portions of the wire bonds, and unencapsulated portions of the wire bonds are defined by portions of the wire bonds, including the ends, are uncovered by the encapsulation layer.

An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.

A semiconductor package may include a substrate, a chip structure on the substrate, a connection pad on the substrate, a connection sheet on the connection pad, and a connection wire electrically connecting the chip structure and the substrate, the connection pad and the connection sheet may include the same material, and a grain boundary may be formed between the connection sheet and the connection pad.

A semiconductor device and method for manufacturing the same are provided. The semiconductor device includes a substrate, an electronic component, a bonding wire, and a supporter. The electronic component is disposed on the substrate. The bonding wire includes a first terminal connected to the electronic component and a second terminal connected to the substrate. The bonding wire is disposed against the supporter.