A semiconductor module includes: a dissipating metal plate including a recess provided on an upper surface; an insulating substrate provided on a bottom surface of the recess and including a circuit pattern; a semiconductor device provided on the insulating substrate and connected to the circuit pattern; a case bonded to a peripheral portion on the upper surface of the dissipating metal plate and surrounding the insulating substrate and the semiconductor device; a case electrode provided on the case; a wire connecting the semiconductor device and the case electrode; and a sealant provided in the case and sealing the insulating substrate, the semiconductor device, and the wire, wherein a sidewall of the recess has a taper.

A semiconductor package includes a package substrate, a processor chip mounted on a first region of the package substrate, a plurality of memory chips mounted on a second region of the package substrate being spaced apart from the first region of the package substrate, a signal transmission device mounted on a third region of the package substrate between the first and second regions of the package substrate, and a plurality of first bonding wires connecting the plurality of memory chips to the signal transmission device. The signal transmission device includes upper pads connected to the plurality of first bonding wires, penetrating electrodes arranged in a main body portion of the signal transmission device and connected to the upper pads, and lower pads in a lower surface portion of the signal transmission device and connected to the penetrating electrodes and connected to the package substrate via bonding balls.

A packaged electronic device includes a substrate having a lead. The lead includes an outward facing side surface having a first height, and an inward facing side surface having a second height that is less than the first height. An electronic device is electrically connected to the lead. A package body encapsulates the electronic device and portions of the lead. The outward facing side surface is exposed through a side surface of the package body, and the inward facing side surface is encapsulated by the package body. A conductive layer is disposed on the outward facing side surface to provide the packaged electronic device with an enhanced wettable flank. In one embodiment, the electronic device is electrically connected to a thick terminal portion having the outward facing side surface. In another embodiment, the electronic device is electrically connected to a thin terminal portion having the inward facing side surface.

A stack package includes first and second sub-chip stacks stacked on a package substrate and bonding wires. The first sub-chip stack includes first and second sub-chips. The first sub-chip has a first surface on which a first common pad is disposed. The second sub-chip has a third surface on which a second common pad is disposed. The third surface is bonded to the first surface such that the second common pad is bonded to the first common pad. The second sub-chip includes a fourth surface opposite to the second common pad and a through hole extending from the fourth surface to reveal the second common pad. The bonding wire is connected to the second common pad via the through hole and electrically connects both of the first and second common pads to the package substrate.

A semiconductor device includes a semiconductor element, a first terminal, a second terminal, a first conductor, a first connecting member, and a second connecting member. The semiconductor element includes a first electrode, a second electrode, and a third electrode, and is configured to perform on/off control between the first electrode and the second electrode based on a drive signal inputted to the third electrode. The first terminal and the second terminal are separated apart from each other and electrically connected to the first electrode. The first conductor is electrically connected to the first terminal. The first connecting member electrically connects the first electrode and the first conductor. The second connecting member electrically connects the first conductor and the second terminal.

A semiconductor light emitting device includes a main lead, a sub lead, a semiconductor light emitting element bonded to the main lead, and a protective element bonded to the sub lead, wherein the semiconductor light emitting element is connected to the main lead and the sub lead via a first wire and a second wire, respectively, wherein the protective element has a main surface electrode and a back surface electrode which is connected to the sub lead via a conductive bonding material, and wherein the main surface electrode of the protective element is connected to the main lead via a third wire, a connecting wiring which connects electrodes of the semiconductor light emitting element, and a connecting member including the second wire.

A mold chase has first and second mold clamps having corresponding teeth and recesses configured such that, when the mold chase is closed onto a sub-assembly having an IC die mounted onto and wire-bonded to a lead frame, there are gaps between the recesses and the leads of the lead frame that allow molding compound to extend along opposing sides of proximal ends of the leads to increase the metal-to-metal distance between adjacent leads, thereby reducing the chances of, for example, tin migrating during HAST testing to form undesirable conduction paths between adjacent leads. In some embodiments, the mold clamp teeth have chamfered edges that are tapered at the mold chase cavity to form wedge-shaped gaps that allow the molding compound to extrude along the proximal ends of the leads of MaxQFP packages having two levels of “J” leads and gullwing leads.

A semiconductor package includes a redistribution substrate having first and second surfaces opposing one another, a first semiconductor chip on the first surface of the redistribution substrate, a passive device and a metal post on the second surface of the redistribution substrate and electrically connected to the redistribution pattern, a second encapsulant encapsulating at least side surfaces of the passive device and the metal post, a second insulating layer on a lower surface of the metal post and a lower surface of the second encapsulant, and having an opening exposing at least a portion of the lower surface of the metal post, and a connection bump filling the opening of the second insulating layer and in direct contact with the lower surface of the exposed metal post, wherein the metal post has a height greater than a height of each of the redistribution pattern and the redistribution via.

A semiconductor device includes a printed circuit board having a plurality of first electrode pads on a first main surface and a plurality of second electrode pads electrically connected to at least one of the plurality of first electrode pads on a second main surface, a first chip disposed on the first main surface and having a non-volatile memory; a second chip having a third electrode pad and a control circuit configured to control an operation of the non-volatile memory, a dummy chip having a component that has a higher thermal conductivity than a substrate of the second chip, and a sealing member sealing the first, second, and dummy chips. The third electrode pad is connected to the component of the dummy chip via a first wiring, and the component of the dummy chip is connected to one of the plurality of first electrode pads via a second wiring.

Provided is an electronic part that includes a first substrate including a first base and a first coil, the first coil being electrically insulated from the first base, a second substrate including a second base and a second coil, the second coil being electrically insulated from the second base, and a support member that supports the first substrate and the second substrate. The first substrate is arranged between the second substrate and the support member in a thickness direction of the support member and overlaps the second substrate as viewed in the thickness direction, the first base is positioned between the first coil and the second coil in the thickness direction, and the first coil and the second coil are magnetically coupled.