Patent classifications
H01L2224/49109
Trench capacitor with warpage reduction
A trench capacitor includes a plurality of trenches in a semiconductor substrate. A first polysilicon layer is located within the plurality of trenches and over a top surface of the substrate. The first polysilicon layer is continuous between the plurality of trenches. The trench capacitor further includes a plurality of second polysilicon layers. Each of the second polysilicon layers fills a corresponding trench of the plurality of trenches. The second polysilicon layers each extend to a top surface of the first polysilicon layer.
SEMICONDUCTOR DEVICE
According to one embodiment, a semiconductor device includes a substrate with a first terminal, a first semiconductor memory chip on the substrate and having a first pad, and a second semiconductor memory chip on the first semiconductor memory chip and having a second pad. A first bonding wire connects to the first terminal and both the first pad and the second pad. A second bonding wire connects to the first terminal and one of the first pad or the second pad from a coordinate position offset from a coordinate position of the first bonding wire.
ELECTRONIC PACKAGE AND METHOD FOR MANUFACTURING THE SAME
The present disclosure provides an electronic package and method of manufacturing the same. The electronic package includes an electronic device including a first carrier and a first electronic component disposed on the first carrier, a second carrier adjacent to the first carrier of the electronic device, and a conductive layer at least partially covering the electronic device, and separating the electronic device from the second carrier.
LED BRACKET, LED DEVICE, AND EDGE-LIT BACKLIGHT MODULE
The present invention provides a light emitting diode (LED) bracket, an LED device, and an edge-lit backlight module. The LED bracket includes an insulating stand, and a conductive anode lead and a conductive cathode lead which are embedded in the insulating stand. The conductive anode lead and the conductive cathode lead comprise an anode pad and a cathode pad exposed from an upper surface of the insulating stand. The anode pad and the cathode pad are arranged symmetrical to each other on the insulating stand. The present invention utilizes symmetrically arranged metal pads to effectively solve a color difference problem of the LED device, improve luminous efficiency and stability of the LED device, and realize large-sized chip packaging, high-efficiency flip-chip packaging, and high-voltage LED packaging.
OPTICAL MODULE
An optical module includes: a light source; an optical modulator capable of modulating light from the light source; a capacitor with an upper electrode and a lower electrode; and a resistor connected in series with and bonded face-to-face to the upper electrode of the capacitor. The resistor and the capacitor are connected in parallel with the optical modulator.
PCB for bare die mount and process therefore
Embodiments for a circuit board comprising a plurality of electrically conductive layers and a plurality of electrically non-conductive layers in a laminated stack are provided. The laminated stack defines a front face and a back face. A thermal conductive heat body extends from a die bond pad on the front face to an electrically conductive layer on the back face. The die bond pad is configured for a bare die to be mounted thereon. A bonding agent disposed around the thermal conductive heat body adhering the thermal conductive heat body to walls of an opening of the laminated stack and at least one of the plurality of electrically non-conductive layers are a monolithic structure. A plurality of wire bond pads on the front face adjacent to the die bond pad have a surface finish material thereon. The surface finish material is configured for wire bonding thereto.
SEMICONDUCTOR PACKAGE INCLUDING SEMICONDUCTOR CHIP AND CAPACITOR
A semiconductor package may include a semiconductor chip mounted on a package substrate, and capacitors. The capacitors may be disposed between the package substrate and the first semiconductor chip, and the capacitors may support the first semiconductor chip.
Semiconductor module and semiconductor device
According to one aspect of the present disclosure, a semiconductor module includes a semiconductor chip having a first electrode, a second electrode, and a control electrode to receive a control signal that controls a current flowing between the first electrode and the second electrode, a package having an upper surface, a back surface that is an opposite surface of the upper surface, and a plurality of side surfaces provided between the upper surface and the back surface, the package containing the semiconductor chip, a first terminal provided to the package and being electrically connected to the first electrode, a second terminal provided to the package and being electrically connected to the second electrode and a control terminal electrically connected to the control electrode and being provided on all of the plurality of side surfaces of the package so as to surround the package.
Stack packages including a supporting substrate
A stack package includes a supporting substrate that supports first and second semiconductor dies. The supporting substrate is disposed on a package substrate and is supported by first and second connection bumps. Redistributed line (RDL) patterns are disposed on the supporting substrate to electrically connect the first semiconductor die to the first and second connection bumps. The second semiconductor dies are connected to the package substrate by bonding wires.
Semiconductor device packages with electrical routing improvements and related methods
Semiconductor device packages may include a die-attach pad and a semiconductor die supported above the die-attach pad. A spacer comprising an electrically conductive material may be supported above the semiconductor die or between the semiconductor die and the die-attach pad. A wire bond may extend from a bond pad on an active surface of the semiconductor die to the spacer. Another wire bond may extend from the spacer to a lead finger or the die-attach pad. An encapsulant material may encapsulate the semiconductor die, the spacer, the wire bond, the other wire bond, the die-attach pad, and a portion of any lead fingers.