H01L2224/49109

SEMICONDUCTOR DEVICE AND POWER CONVERTER

A semiconductor device includes: a semiconductor element, a first lead frame, a second lead frame, and a thermally conductive member; and a sealing member sealing them. The first lead frame includes: a first portion exposed from a first side surface of the sealing member; and a second portion located closer to a lower surface of the sealing member than the first portion in a second direction crossing the lower surface. The semiconductor device further includes an intermediate frame which is located between the second portion and the fifth portion at least in the second direction. A distance, in the first direction, between the second portion and the intermediate frame is shorter than a distance, in the second direction, between an upper surface of the first portion and the upper surface of the second portion.

SEMICONDUCTOR PACKAGE INCLUDING SEMICONDUCTOR CHIPS
20230154886 · 2023-05-18 ·

A semiconductor package may include a semiconductor chip on a package substrate. The semiconductor package may include a plurality of conductive connections connecting the semiconductor chip to the package substrate may be disposed, a plurality of towers which are apart from one another and each include a plurality of memory chips may be disposed, wherein a lowermost memory chip of each of the plurality of towers overlaps the semiconductor chip from a top-down view. The semiconductor package further includes a plurality of adhesive layers be attached between the lowermost memory chip of each of the plurality of towers and the semiconductor chip.

Memory package and storage device including the same

A memory package includes a package substrate including a redistribution layer and bonding pads connected to the redistribution layer, the redistribution layer including a plurality of signal paths; a buffer chip mounted on the package substrate and including a plurality of chip pads corresponding to a plurality of memory channels; and a plurality of memory chips stacked on the package substrate and divided into a plurality of groups corresponding to the plurality of memory channels, wherein memory chips of a first group, among the plurality of memory chips, are connected to first chip pads of the plurality of chip pads through first wires, and wherein memory chips of a second group, among the plurality of memory chips, are connected to second chip pads of the plurality of chip pads through second wires and at least a portion of the plurality of signal paths.

LED ASSEMBLY WITH OMNIDIRECTIONAL LIGHT FIELD
20230142465 · 2023-05-11 ·

An LED assembly includes an omnidirectional light field. The LED assembly has a transparent substrate with first and second surfaces facing to opposite orientations respectively. LED chips are mounted on the first surface and are electrically interconnected by a circuit. A transparent capsule with a phosphor dispersed therein is formed on the first surface and substantially encloses the circuit and the LED chips. First and second electrode plates are formed on the first or second surface, and electrically connected to the LED chips.

LED ASSEMBLY WITH OMNIDIRECTIONAL LIGHT FIELD
20230142465 · 2023-05-11 ·

An LED assembly includes an omnidirectional light field. The LED assembly has a transparent substrate with first and second surfaces facing to opposite orientations respectively. LED chips are mounted on the first surface and are electrically interconnected by a circuit. A transparent capsule with a phosphor dispersed therein is formed on the first surface and substantially encloses the circuit and the LED chips. First and second electrode plates are formed on the first or second surface, and electrically connected to the LED chips.

CHIP-PACKAGE DEVICE
20230207512 · 2023-06-29 ·

A chip-package device includes a substrate, a first chip, a first conductive layer, first wirings, and second wirings. The substrate includes a first top surface and first connection pads disposed on the first top surface. The first chip is disposed on the first top surface, and the first chip includes a second top surface and second connection pads disposed on the second top surface. The first conductive layer is disposed on the second top surface. The first wirings connect the first connection pads and the first conductive layer, and the second wirings connect the second connection pads and another side of the first conductive layer. Each of the first wirings and each of the second wirings respectively connect opposite sides of the first conductive layer.

Configurable, power supply voltage referenced single-ended signaling with ESD protection

A single-ended data transmission system transmits a signal having a signal voltage that is referenced to a power supply voltage and that swings above and below the power supply voltage. The power supply voltage is coupled to a power supply rail that also serves as a signal return path. The signal voltage is derived from two signal supply voltages generated by a pair of charge pumps that draw substantially same amount of current from a power supply.

Semiconductor package
09852966 · 2017-12-26 · ·

A semiconductor package includes a die pad, a semiconductor die mounted on the die pad, a plurality of leads including a power lead disposed along a peripheral edge of the die pad, at least one connecting bar connecting the die pad, a power bar disposed on one side of the connecting bar, and a surface mount device (SMD) having a first terminal and a second terminal. The first terminal is electrically connected to the ground level through a first bond wire. The second terminal is electrically connected a power level through a second bond wire.

Semiconductor package
09852966 · 2017-12-26 · ·

A semiconductor package includes a die pad, a semiconductor die mounted on the die pad, a plurality of leads including a power lead disposed along a peripheral edge of the die pad, at least one connecting bar connecting the die pad, a power bar disposed on one side of the connecting bar, and a surface mount device (SMD) having a first terminal and a second terminal. The first terminal is electrically connected to the ground level through a first bond wire. The second terminal is electrically connected a power level through a second bond wire.

PROCESS OF ENCAPSULATING ELECTRONIC COMPONENTS
20170358509 · 2017-12-14 ·

In order to carry out the encapsulation of electronic components, the invention proposes to cover the electronic components (7) with a heat-polymerisable material corresponding to a composition comprising a diimide constituent and a diamine constituent, in which the diimide constituent has been predissolved in the diamine constituent, and to heat the assembly obtained under conditions suitable for carrying out the curing of the material by an addition polymerisation reaction between said diimide constituent and the diamine constituent. The invention finds an application in particular in the field of electronic power modules.

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