A first signal electrode and a second signal electrode are connected by a first wire, a first ground electrode and a fourth ground electrode are connected by a second wire, and a second ground electrode and a third ground electrode are connected by a third wire. The second wire and the third wire cross at only one position above the first wire.

A semiconductor device includes a substrate including a main surface, a semiconductor element mounted on the main surface, a drive pad, and drive wires. The semiconductor element includes a front surface that faces in a same direction as the main surface and a drive electrode formed on the front surface and containing SiC. The drive wires are spaced apart from each other and connect the drive electrode to the drive pad. The drive wires include a first drive wire and a second drive wire configured to be a combination of furthermost ones of the drive wires. The first drive wire and the second drive wire are separated from each other by a greater distance at the drive pad than at the drive electrode as viewed in a first direction that is perpendicular to the main surface of the substrate.

A packaged electronic device includes a package structure with opposite first and second sides spaced apart from one another along a first direction, and opposite third and fourth sides spaced apart from one another along a second direction, as well as first and second leads. The first lead includes a first portion that extends outward from the third side of the package structure and extends downward toward a plane of the first side and away from a plane of the second side. The second lead includes a first portion that extends outward from the third side of the package structure, and the second lead extends upward toward the plane of the second side and away from the plane of the first side to allow connection to another circuit or component, such as a second packaged electronic device, a passive circuit component, a printed circuit board, etc.

A method of determining a sequence for creating a plurality of wire loops is provided. The method includes (a) providing workpiece data for a workpiece. The workpiece data includes (i) position data for bonding locations of the workpiece, and (ii) wire loop data for a plurality of wire loops providing interconnection between ones of the bonding locations. The method also includes (b) analyzing the workpiece data. The step of analyzing includes considering overlap conditions between ones of the plurality of wire loops, considering wire loop heights of ones of the plurality of wire loops, considering lateral bend conditions between ones of the plurality of wire loops, and considering wire loop positions for ones of the plurality of wire loops. The method also includes (c) providing a sequence of creating the plurality of wire loops in connection with the workpiece at least partially based on the results of step (b).

An apparatus and method for measuring loop height of overlapping bonded wires, interconnecting the pads of a single or stacked silicon chips to the pads of a substrate taking the steps of: focussing of an optical assembly at multiple points of the bond wire including overlapping bond wires, capturing an image of the bond wire at each of the predetermined focused points; calculating the height of each point of the wire with respect to a reference plane; and tabulating the height data using the X, Y and Z coordinates.

A semiconductor device includes a first die pad having a main surface, a second die pad having a second main surface, a first switching element connected to the first main surface, a second switching element connected to the second main surface, a first connecting member connecting the first main surface electrode of the first switching element to the second die pad, an encapsulation resin encapsulating the first switching element, the second switching element, the first die pad, the second die pad, and the first connecting member, and leads projecting out of one of the resin side surfaces of the encapsulation resin.

A semiconductor device includes: a plurality of semiconductor elements connected in parallel; a rectifier element connected in anti-parallel to the plurality of semiconductor elements; a power terminal electrically connected to the plurality of semiconductor elements; and an electrical conductor electrically connected to the power terminal and the plurality of semiconductor elements and including a pad portion to which the plurality of semiconductor elements are bonded. The plurality of first semiconductor elements include a first element and a second element. The minimum conduction path of the first element to the power terminal is shorter than the minimum conduction path of the second element to the power terminal. The pad portion includes a first section to which the first element is bonded and a second section to which the second element is bonded. The rectifier element is located in the first section of the pad portion.

A semiconductor device includes: a first semiconductor element to switch between an electrical communication state and a blocked state in accordance with a first driving signal; a first control element to generate the first driving signal based on a first input signal; a second semiconductor element to switch between an electrical communication state and a blocked state in accordance with a second driving signal; and a second control element to generate the second driving signal based on a second input signal. The second input signal is input to the first control element, and thus the first control element determines whether or not the second semiconductor element is in the electrical communication state based on the second input signal. When the second semiconductor element is in the electrical communication state, the first control element delays switching of the first semiconductor element from the blocked state to the electrical communication state.

A semiconductor device includes: an oscillator including external terminals disposed on a first face with a specific distance along a first direction; an integrated circuit including a first region formed with first electrode pads along one side, and a second region formed with second electrode pads on two opposing sides of the first region; a lead frame that includes terminals at a peripheral portion, and on which the oscillator and the integrated circuit are mounted such that the external terminals, the first and second electrode pads face in a substantially same direction and such that one side of the integrated circuit is substantially parallel to the first direction; a first bonding wire that connects one external terminal to one first electrode pad; a second bonding wire that connects one terminal of one lead frame to one second electrode pad; and a sealing member that seals all of the components.

An electronic package and a manufacturing method thereof are provided, where a plurality of shielding wires are arranged on a carrier and spanning across an electronic component to cover the electronic component, so that the shielding wires serve as a shielding structure to protect the electronic component from the interference of external electromagnetic waves.