A device is provided. The device includes a bridge layer over a first substrate. A first connector electrically connecting the bridge layer to the first substrate. A first die is coupled to the bridge layer and the first substrate, and a second die is coupled to the bridge layer.

A device is provided. The device includes a bridge layer over a first substrate. A first connector electrically connecting the bridge layer to the first substrate. A first die is coupled to the bridge layer and the first substrate, and a second die is coupled to the bridge layer.

A semiconductor device and a semiconductor package including the same are provided. The semiconductor device includes a semiconductor element; a protective layer disposed adjacent to the surface of the semiconductor element, the protective layer defining an opening to expose the semiconductor element; a first bump disposed on the semiconductor element; and a second bump disposed onto the surface of the protective layer. The first bump has a larger cross-section surface area than the second bump.

A semiconductor device and a semiconductor package including the same are provided. The semiconductor device includes a semiconductor element; a protective layer disposed adjacent to the surface of the semiconductor element, the protective layer defining an opening to expose the semiconductor element; a first bump disposed on the semiconductor element; and a second bump disposed onto the surface of the protective layer. The first bump has a larger cross-section surface area than the second bump.

A semiconductor package includes an interposer, a die, a protective layer, a plurality of first electrical connectors and a first molding material. The die includes a first surface and a second surface opposite to the first surface, and the die is bonded to the interposer through the first surface. The protective layer is disposed on the second surface of the die. The first electrical connectors are disposed aside the die. The first molding material is disposed aside the die, the protection layer and the first electrical connectors.

A semiconductor package includes an interposer, a die, a protective layer, a plurality of first electrical connectors and a first molding material. The die includes a first surface and a second surface opposite to the first surface, and the die is bonded to the interposer through the first surface. The protective layer is disposed on the second surface of the die. The first electrical connectors are disposed aside the die. The first molding material is disposed aside the die, the protection layer and the first electrical connectors.

A semiconductor package includes: a lower substrate including a lower wiring layer; a semiconductor chip disposed on the lower substrate, the semiconductor chip including a first surface facing the lower substrate and a second surface opposite to the first surface; an upper substrate disposed on the lower substrate and the semiconductor chip, the upper substrate including a lower surface on which support members protruding toward the second surface of the semiconductor chip are disposed; a connection structure disposed between the lower substrate and the upper substrate; an encapsulant filling a space between the lower substrate and the upper substrate and encapsulating at least a portion of the semiconductor chip and the connection structure; and adhesive members disposed on the second surface of the semiconductor chip such as to correspond to the support members, respectively, the adhesive members disposed in contact with the second surface and the support members.

A semiconductor package including a passivation film, a mold layer on the passivation film, a connecting pad having a T shape, the T shape including a first portion and a second portion on the first portion, the first portion penetrating the passivation film, the second portion penetrating a part of the mold layer, a solder ball on the first portion of the connecting pad, an element on the second portion of the connecting pad, a wiring structure on the mold layer, the wiring structure including an insulating layer and a wiring pattern inside the insulating layer, and a semiconductor chip on the wiring structure may be provided.

In one example, a semiconductor package comprises a substrate having a top surface and a bottom surface, an electronic device mounted on the top surface of the substrate and coupled to one or more interconnects on the bottom surface of the substrate, a cover over the electronic device, a casing around a periphery of the cover, and an encapsulant between the cover and the casing and the substrate.

In one example, a semiconductor package comprises a substrate having a top surface and a bottom surface, an electronic device mounted on the top surface of the substrate and coupled to one or more interconnects on the bottom surface of the substrate, a cover over the electronic device, a casing around a periphery of the cover, and an encapsulant between the cover and the casing and the substrate.