Patent classifications
H
ELECTRICITY
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H01
ELECTRIC ELEMENTS
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H01L
SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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2224/00
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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H01L2224/80
Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
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H01L2224/8138
Bonding interfaces outside the semiconductor or solid-state body
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H01L2224/814
with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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H01L2224/81438
the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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H01L2224/81449
Manganese [Mn] as principal constituent
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H01L2224/81449

SEMICONDUCTOR CHIP, ELECTRONIC DEVICE INCLUDING THE SAME, AND METHOD OF CONNECTING THE SEMICONDUCTOR CHIP TO THE ELECTRONIC DEVICE
20180068931 · 2018-03-08 ·

A semiconductor chip includes: a base substrate; a conductive pad on one surface of the base substrate; an insulating layer on the one surface of the base substrate and having an opening exposing a portion of the conductive pad; and a bump on the exposed portion of the conductive pad and on the insulating layer around the opening. The bump includes a plurality of concave portions corresponding to the opening and is arranged in a longitudinal direction of the bump.

SEMICONDUCTOR CHIP, ELECTRONIC DEVICE INCLUDING THE SAME, AND METHOD OF CONNECTING THE SEMICONDUCTOR CHIP TO THE ELECTRONIC DEVICE
20180068931 · 2018-03-08 ·

A semiconductor chip includes: a base substrate; a conductive pad on one surface of the base substrate; an insulating layer on the one surface of the base substrate and having an opening exposing a portion of the conductive pad; and a bump on the exposed portion of the conductive pad and on the insulating layer around the opening. The bump includes a plurality of concave portions corresponding to the opening and is arranged in a longitudinal direction of the bump.

Semiconductor device having insulating layers containing oxygen and a barrier layer containing manganese
09704740 · 2017-07-11 · ·

A semiconductor device includes an insulating layer formed over a semiconductor substrate, the insulating layer including oxygen, a first wire formed in the insulating layer, and a second wire formed in the insulating layer over the first wire and containing manganese, oxygen, and copper, the second wire having a projection portion formed in the insulating layer and extending downwardly but spaced apart from the first wire.

SEMICONDUCTOR DEVICE HAVING INSULATING LAYERS CONTAINING OXYGEN AND A BARRIER LAYER CONTAINING MANGANESE
20170047246 · 2017-02-16 · ·

A semiconductor device includes an insulating layer formed over a semiconductor substrate, the insulating layer including oxygen, a first wire formed in the insulating layer, and a second wire formed in the insulating layer over the first wire and containing manganese, oxygen, and copper, the second wire having a projection portion formed in the insulating layer and extending downwardly but spaced apart from the first wire.