Patent classifications
H01L2224/81455
METHODS FOR FORMING CONDUCTIVE ELEMENTS FOR MICROELECTRONIC COMPONENTS, RELATED CONDUCTIVE ELEMENTS, AND MICROELECTRONIC COMPONENTS, ASSEMBLIES AND ELECTRONIC SYSTEMS INCORPORATING SUCH CONDUCTIVE ELEMENTS
A microelectronic component comprises a substrate having at least one bond pad on a surface thereof and a metal pillar structure on the at least one bond pad, the metal pillar structure comprising a metal pillar on the at least one bond pad and a solder material having a portion within a reservoir within the metal pillar and another portion protruding from an end of the metal pillar opposite the at least one bond pad. Methods for forming the metal pillar structures, metal pillar structures, assemblies and systems incorporating the metal pillar structures are also disclosed.
MICROELECTRONIC STRUCTURES INCLUDING GLASS CORES
Disclosed herein are microelectronic structures including glass cores, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a glass core having through-glass vias (TGVs) therein; a metallization region at a first face of the glass core, wherein a conductive pathway in the first metallization region is conductively coupled to at least one of the TGVs; a bridge component in the metallization region; a first conductive contact at a face of the metallization region, wherein the first conductive contact is conductively coupled to the conductive pathway; and a second conductive contact at the face of the metallization region, wherein the second conductive contact is conductively coupled to the bridge component.
CONNECTION STRUCTURE EMBEDDED SUBSTRATE
A connection structure embedded substrate includes a printed circuit board including a first insulating body and a plurality of first wiring layers disposed on at least one of an external region or an internal region of the first insulating body; and a connection structure embedded in the first insulating body and including first and second substrates. The first and second substrates are disposed adjacent to each other.
CONNECTION STRUCTURE EMBEDDED SUBSTRATE
A connection structure embedded substrate includes a printed circuit board including a first insulating body and a plurality of first wiring layers disposed on at least one of an external region or an internal region of the first insulating body; and a connection structure embedded in the first insulating body and including first and second substrates. The first and second substrates are disposed adjacent to each other.
Semiconductor package and method manufacturing the same
A semiconductor package including an insulating encapsulation, an integrated circuit component, and conductive elements is provided. The integrated circuit component is encapsulated in the insulating encapsulation, wherein the integrated circuit component has at least one through silicon via protruding from the integrated circuit component. The conductive elements are located on the insulating encapsulation, wherein one of the conductive elements is connected to the at least one through silicon via, and the integrated circuit component is electrically connected to the one of the conductive elements through the at least one through silicon via.
Semiconductor package and method manufacturing the same
A semiconductor package including an insulating encapsulation, an integrated circuit component, and conductive elements is provided. The integrated circuit component is encapsulated in the insulating encapsulation, wherein the integrated circuit component has at least one through silicon via protruding from the integrated circuit component. The conductive elements are located on the insulating encapsulation, wherein one of the conductive elements is connected to the at least one through silicon via, and the integrated circuit component is electrically connected to the one of the conductive elements through the at least one through silicon via.
Package structure and method for connecting components
A package structure and a method for connecting components are provided, in which the package includes a first substrate including a first wiring and at least one first contact connecting to the first wiring; a second substrate including a second wiring and at least one second contact connecting to the second wiring, the at least one first contact and the at least one second contact partially physically contacting with each other or partially chemically interface reactive contacting with each other; and at least one third contact surrounding the at least one first contact and the at least one second contact. The first substrate and the second substrate are electrically connected with each other at least through the at least one first contact and the at least one second contact.
Package structure and method for connecting components
A package structure and a method for connecting components are provided, in which the package includes a first substrate including a first wiring and at least one first contact connecting to the first wiring; a second substrate including a second wiring and at least one second contact connecting to the second wiring, the at least one first contact and the at least one second contact partially physically contacting with each other or partially chemically interface reactive contacting with each other; and at least one third contact surrounding the at least one first contact and the at least one second contact. The first substrate and the second substrate are electrically connected with each other at least through the at least one first contact and the at least one second contact.
EMI shielding for flip chip package with exposed die backside
A semiconductor device has a substrate and a semiconductor die disposed over the substrate. An encapsulant is deposited over the semiconductor die and substrate with a surface of the semiconductor die exposed from the encapsulant. A first shielding layer is formed over the semiconductor die. In some embodiments, the first shielding layer includes a stainless steel layer in contact with the surface of the semiconductor die and a copper layer formed over the stainless steel layer. The first shielding layer may further include a protective layer formed over the copper layer. One embodiment has a heatsink bonded to the semiconductor die through a solder layer. A second shielding layer can be formed over a side surface of the semiconductor die.
Electrical interconnect structure with radial spokes for improved solder void control
An electrical interconnect structure includes a bond pad having a substantially planar bonding surface, and a solder enhancing structure that is disposed on the bonding surface and includes a plurality of raised spokes that are each elevated from the bonding surface. Each of the raised spokes has a lower wettability relative to a liquefied solder material than the bonding surface. Each of the raised spokes extend radially outward from a center of the solder enhancing structure.