A semiconductor package according to an embodiment may include a printed circuit board that includes a first pad portion, a semiconductor chip that is mounted on the printed circuit board and includes a second pad portion, a coupling part that is between the first pad portion and the second pad portion, and a spacer that is between the coupling part and the first pad portion. The first pad portion and the second pad portion may be electrically coupled to each other through the coupling part and the spacer.

A semiconductor device with etched grooves for embedded devices is disclosed and may, for example, include a substrate comprising a top surface and a bottom surface, a groove extending into the substrate from the bottom surface, and a redistribution structure in the substrate between the top surface and the bottom surface of the substrate. A semiconductor die may, for example, be coupled to the top surface of the substrate. An electronic device may, for example, be at least partially within the groove and electrically coupled to the redistribution structure. A conductive pad may, for example, be on the bottom surface of the substrate. A conductive bump may, for example, be on the conductive pad. The electronic device in the groove may, for example, extend beyond the bottom surface of the substrate a distance that is less than a height of the conductive bump from the bottom surface of the substrate. An encapsulant may, for example, encapsulate the semiconductor die and the top surface of the substrate. The electronic device may, for example, comprise a capacitor.

A semiconductor device with etched grooves for embedded devices is disclosed and may, for example, include a substrate comprising a top surface and a bottom surface, a groove extending into the substrate from the bottom surface, and a redistribution structure in the substrate between the top surface and the bottom surface of the substrate. A semiconductor die may, for example, be coupled to the top surface of the substrate. An electronic device may, for example, be at least partially within the groove and electrically coupled to the redistribution structure. A conductive pad may, for example, be on the bottom surface of the substrate. A conductive bump may, for example, be on the conductive pad. The electronic device in the groove may, for example, extend beyond the bottom surface of the substrate a distance that is less than a height of the conductive bump from the bottom surface of the substrate. An encapsulant may, for example, encapsulate the semiconductor die and the top surface of the substrate. The electronic device may, for example, comprise a capacitor.

A flux formulation includes an activator and a protic solvent. The activator may be glutaric acid, levulinic acid, 2-ketobutyric acid, 2-oxovaleric acid, or mixtures thereof. Suitable protic solvents include alkanediol, alkoxy propanol and alkoxy ethanol. The flux formulation may be a no-clean flux formulation that may be used in the soldering of electronic circuit board assemblies, for example, in conjunction with a support fixture having a planar back surface that minimizes vibrations during processing that might otherwise cause misalignment between a chip and a substrate prior to solder reflow.

A flux formulation includes an activator and a protic solvent. The activator may be glutaric acid, levulinic acid, 2-ketobutyric acid, 2-oxovaleric acid, or mixtures thereof. Suitable protic solvents include alkanediol, alkoxy propanol and alkoxy ethanol. The flux formulation may be a no-clean flux formulation that may be used in the soldering of electronic circuit board assemblies, for example, in conjunction with a support fixture having a planar back surface that minimizes vibrations during processing that might otherwise cause misalignment between a chip and a substrate prior to solder reflow.

Alight emitting device package may include a printed circuit board and a plurality of light emitting devices mounted on the printed circuit board, wherein a first light emitting device of the plurality of light emitting devices may comprise first to fourth conductor pads formed discretely on the bottom surface of the light emitting device, the printed circuit board comprises first to fourth conductor patterns formed discretely on the top surface of the printed circuit board, and the first to fourth conductor patterns are connected to respective first to fourth conductor pads by respective first to fourth solders.

Alight emitting device package may include a printed circuit board and a plurality of light emitting devices mounted on the printed circuit board, wherein a first light emitting device of the plurality of light emitting devices may comprise first to fourth conductor pads formed discretely on the bottom surface of the light emitting device, the printed circuit board comprises first to fourth conductor patterns formed discretely on the top surface of the printed circuit board, and the first to fourth conductor patterns are connected to respective first to fourth conductor pads by respective first to fourth solders.

A semiconductor package and a method of manufacturing a semiconductor package. As non-limiting examples, various aspects of this disclosure provide various semiconductor packages, and methods of making thereof, that comprise a cover layer that enhances reliability of the semiconductor packages.

A semiconductor package and a method of manufacturing a semiconductor package. As non-limiting examples, various aspects of this disclosure provide various semiconductor packages, and methods of making thereof, that comprise a cover layer that enhances reliability of the semiconductor packages.

Alight emitting device package may include a printed circuit board and a plurality of light emitting devices mounted on the printed circuit board, wherein a first light emitting device of the plurality of light emitting devices may comprise first to fourth conductor pads formed discretely on the bottom surface of the light emitting device, the printed circuit board comprises first to fourth conductor patterns formed discretely on the top surface of the printed circuit board, and the first to fourth conductor patterns are connected to respective first to fourth conductor pads by respective first to fourth solders.