A display apparatus is provided. The display apparatus includes a display substrate and a plurality of pads arranged above the display substrate. Each of the plurality of pads includes a first conductive layer, at least a portion of which is covered by an insulating film, a second conductive layer arranged above the first conductive layer, and a clamping portion formed in the second conductive layer.

A display apparatus is provided. The display apparatus includes a display substrate and a plurality of pads arranged above the display substrate. Each of the plurality of pads includes a first conductive layer, at least a portion of which is covered by an insulating film, a second conductive layer arranged above the first conductive layer, and a clamping portion formed in the second conductive layer.

An adhesive member includes: a conductive particle layer including a plurality of conductive particles; a non-conductive layer disposed on the conductive particle layer; and a screening layer interposed between the conductive particle layer and the non-conductive layer and includes a plurality of screening members spaced apart from each other.

An adhesive member includes: a conductive particle layer including a plurality of conductive particles; a non-conductive layer disposed on the conductive particle layer; and a screening layer interposed between the conductive particle layer and the non-conductive layer and includes a plurality of screening members spaced apart from each other.

The present disclosure provides an electronic device including a substrate, a conductive pad, a chip and an insulating layer. The conductive pad is disposed on the substrate. The chip is disposed on the conductive pad. The insulating layer is disposed between the conductive pad and the chip, wherein the insulating layer includes an opening, and the chip is electrically connected to the conductive pad through the opening. An outline of the opening includes a plurality of curved corners in a normal direction of the substrate.

The present disclosure provides an electronic device including a substrate, a conductive pad, a chip and an insulating layer. The conductive pad is disposed on the substrate. The chip is disposed on the conductive pad. The insulating layer is disposed between the conductive pad and the chip, wherein the insulating layer includes an opening, and the chip is electrically connected to the conductive pad through the opening. An outline of the opening includes a plurality of curved corners in a normal direction of the substrate.

The present disclosure provides an electronic device including a substrate, a first pad, a second pad and an integrated circuit chip. The first pad is disposed on the substrate. The second pad is disposed on the first pad and electrically connected to the first pad. The integrated circuit chip is disposed on the second pad and is electrically connected to the second pad. The second pad has a plurality of curved corners.

The present disclosure provides an electronic device including a substrate, a first pad, a second pad and an integrated circuit chip. The first pad is disposed on the substrate. The second pad is disposed on the first pad and electrically connected to the first pad. The integrated circuit chip is disposed on the second pad and is electrically connected to the second pad. The second pad has a plurality of curved corners.

Provided is a method of manufacturing a semiconductor having a double-sided substrate including preparing a first substrate on which a specific pattern is formed to enable electrical connection, preparing at least one semiconductor chip bonded to a metal post, bonding the at least one semiconductor chip to the first substrate, bonding a second substrate to the metal post, forming a package housing by packaging the first substrate and the second substrate to expose a lead frame, and forming terminal leads toward the outside of the package housing. Accordingly, the semiconductor chip and the metal post are previously joined to each other and are respectively bonded to the first substrate and the second substrate so that damage generated while bonding the semiconductor chip may be minimized and electrical properties and reliability of the semiconductor chip may be improved.

Provided is a method of manufacturing a semiconductor having a double-sided substrate including preparing a first substrate on which a specific pattern is formed to enable electrical connection, preparing at least one semiconductor chip bonded to a metal post, bonding the at least one semiconductor chip to the first substrate, bonding a second substrate to the metal post, forming a package housing by packaging the first substrate and the second substrate to expose a lead frame, and forming terminal leads toward the outside of the package housing. Accordingly, the semiconductor chip and the metal post are previously joined to each other and are respectively bonded to the first substrate and the second substrate so that damage generated while bonding the semiconductor chip may be minimized and electrical properties and reliability of the semiconductor chip may be improved.