An organic light-emitting diode (OLED) display and a method of manufacturing an OLED display are disclosed. In one aspect, the method includes forming a data electrode layer and patterning the data electrode layer so as to form a source electrode, a drain electrode, and a pad electrode. The method can also include forming a first organic insulating layer over the source, drain and pad electrodes and forming a via hole corresponding to the source electrode or the drain electrode in the first organic insulating layer via a one tone mask. The method can further include forming an OLED including an anode electrically connected to the source electrode or the drain electrode, an organic emission layer, and a cathode, and etching a first portion of the first organic insulating layer formed over the pad electrode and a second portion of the organic emission layer formed over the pad electrode.

An organic light-emitting diode (OLED) display and a method of manufacturing an OLED display are disclosed. In one aspect, the method includes forming a data electrode layer and patterning the data electrode layer so as to form a source electrode, a drain electrode, and a pad electrode. The method can also include forming a first organic insulating layer over the source, drain and pad electrodes and forming a via hole corresponding to the source electrode or the drain electrode in the first organic insulating layer via a one tone mask. The method can further include forming an OLED including an anode electrically connected to the source electrode or the drain electrode, an organic emission layer, and a cathode, and etching a first portion of the first organic insulating layer formed over the pad electrode and a second portion of the organic emission layer formed over the pad electrode.

A semiconductor device assembly including a semiconductor device having a plurality of pillars disposed on a backside surface of the semiconductor device; and a substrate, including: a solder mask layer disposed on a front side surface of the substrate, a plurality of extended bond pads disposed on the frontside surface of the substrate and surrounded by the solder mask layer, the plurality of extended bond pads each having a top surface higher than a top surface of the solder mask layer, and wherein the semiconductor device is directly attached to the substrate by bonding each of the plurality of pillars of the semiconductor device to the top surface of a corresponding one of the plurality of extended bond pads with a solder connection.

A detection structure and a detection method are provided. The method includes the following. A display backplane, a detection circuit board, and a detection light-emitting diode (LED) chip are provided. The detection circuit board is disposed on the display backplane, to connect a first detection line on the detection circuit board with a first contact electrode and connect a second detection line on the detection circuit board with a second contact electrode. A drive signal is output via the display backplane to the first detection line and the second detection line. A contact electrode pair on the display backplane corresponding to the detection LED chip is determined to be abnormal on condition that the detection LED chip is unlighted.

A detection structure and a detection method are provided. The method includes the following. A display backplane, a detection circuit board, and a detection light-emitting diode (LED) chip are provided. The detection circuit board is disposed on the display backplane, to connect a first detection line on the detection circuit board with a first contact electrode and connect a second detection line on the detection circuit board with a second contact electrode. A drive signal is output via the display backplane to the first detection line and the second detection line. A contact electrode pair on the display backplane corresponding to the detection LED chip is determined to be abnormal on condition that the detection LED chip is unlighted.

An adhesive member includes: a conductive particle layer including a plurality of conductive particles; a non-conductive layer disposed on the conductive particle layer; and a screening layer interposed between the conductive particle layer and the non-conductive layer and includes a plurality of screening members spaced apart from each other.

An adhesive member includes: a conductive particle layer including a plurality of conductive particles; a non-conductive layer disposed on the conductive particle layer; and a screening layer interposed between the conductive particle layer and the non-conductive layer and includes a plurality of screening members spaced apart from each other.

A method for manufacturing connection structure, the method includes arranging conductive particles and a first composite on a first electrode located on a first surface of a first member, arranging a second composite on the first electrode and a region other than the first electrode of the first surface, ranging the first surface and a second surface of a second member where a second electrode is located, so that the first electrode and the second electrode are opposed to each other, pressing the first member and the second member, and curing the first composite and the second composite.

A method for manufacturing connection structure, the method includes arranging conductive particles and a first composite on a first electrode located on a first surface of a first member, arranging a second composite on the first electrode and a region other than the first electrode of the first surface, ranging the first surface and a second surface of a second member where a second electrode is located, so that the first electrode and the second electrode are opposed to each other, pressing the first member and the second member, and curing the first composite and the second composite.

The present disclosure provides an electronic device including a substrate, a first pad, an insulating layer, a second pad, a conductive element and a chip. The first pad is disposed on the substrate. The insulating layer is disposed on the first pad and has a plurality of first openings. The second pad is electrically connected to the first pad through the first openings. The conductive particle is disposed on the second pad. The chip is electrically connected to the second pad through the conductive element. In a top view of the electronic device, the first openings are arranged along a long edge of the first pad, and an outline of at least one first opening has a curved shape.