A package includes an electronic chip having a pad. The pad is at least partially covered with adhesion enhancing structures. The pad and the adhesion enhancing structures have at least aluminium in common.

A package includes an electronic chip having a pad. The pad is at least partially covered with adhesion enhancing structures. The pad and the adhesion enhancing structures have at least aluminium in common.

The power semiconductor apparatus includes: a semiconductor device 401; a bonding layer on chip 416 disposed on an upper surface of the semiconductor device; and a metal lead 419 disposed on the upper surface of the semiconductor device and bonded to the bonding layer on chip, wherein the metal lead 420 has a three-laminated structure including: a second metal layer 420b having a CTE equal to or less than 510.sup.6/ C., for example; and a first metal layer 420a and a third metal layer 420c sandwiching the second metal layer and having a CTE equal to or greater than the CTE of the second metal layer. Provided is a power semiconductor apparatus capable of improving reliability thereof by reducing a thermal stress to a bonding layer between a semiconductor power device and a metal lead positioned on an upper surface thereof, and reducing a resistance of the metal lead.

The power semiconductor apparatus includes: a semiconductor device 401; a bonding layer on chip 416 disposed on an upper surface of the semiconductor device; and a metal lead 419 disposed on the upper surface of the semiconductor device and bonded to the bonding layer on chip, wherein the metal lead 420 has a three-laminated structure including: a second metal layer 420b having a CTE equal to or less than 510.sup.6/ C., for example; and a first metal layer 420a and a third metal layer 420c sandwiching the second metal layer and having a CTE equal to or greater than the CTE of the second metal layer. Provided is a power semiconductor apparatus capable of improving reliability thereof by reducing a thermal stress to a bonding layer between a semiconductor power device and a metal lead positioned on an upper surface thereof, and reducing a resistance of the metal lead.

Provided is a semiconductor module comprising a semiconductor chip, a lead frame including a chip connection portion configured to connect the lead frame to the semiconductor chip, and a bonding member configured to connect the chip connection portion and the semiconductor chip, wherein the semiconductor chip includes a semiconductor substrate, an active portion provided on the semiconductor substrate, and a transverse protective film provided above the active portion and provided to traverse the active portion in a top view, wherein the chip connection portion includes a center portion which covers a center of the transverse protective film in a top view and a first cut-out portion provided from a first end side of the chip connection portion towards the center portion.

Provided is a semiconductor module comprising a semiconductor chip, a lead frame including a chip connection portion configured to connect the lead frame to the semiconductor chip, and a bonding member configured to connect the chip connection portion and the semiconductor chip, wherein the semiconductor chip includes a semiconductor substrate, an active portion provided on the semiconductor substrate, and a transverse protective film provided above the active portion and provided to traverse the active portion in a top view, wherein the chip connection portion includes a center portion which covers a center of the transverse protective film in a top view and a first cut-out portion provided from a first end side of the chip connection portion towards the center portion.

Provided is copper paste for joining including metal particles, and a dispersion medium. The metal particles include sub-micro copper particles having a volume-average particle size of 0.12 m to 0.8 m, and micro copper particles having a volume-average particle size of 2 m to 50 m, a sum of the amount of the sub-micro copper particles contained and the amount of the micro copper particles contained is 80% by mass or greater on the basis of a total mass of the metal particles, and the amount of the sub-micro copper particles contained is 30% by mass to 90% by mass on the basis of a sum of a mass of the sub-micro copper particles and a mass of the micro copper particles.

Provided is copper paste for joining including metal particles, and a dispersion medium. The metal particles include sub-micro copper particles having a volume-average particle size of 0.12 m to 0.8 m, and micro copper particles having a volume-average particle size of 2 m to 50 m, a sum of the amount of the sub-micro copper particles contained and the amount of the micro copper particles contained is 80% by mass or greater on the basis of a total mass of the metal particles, and the amount of the sub-micro copper particles contained is 30% by mass to 90% by mass on the basis of a sum of a mass of the sub-micro copper particles and a mass of the micro copper particles.

An integrated circuit package includes a leadframe with a die pad and a lead. A semiconductor die is attached to a top surface of the die pad. A clip has a lead contact area with a surface pattern on a bottom surface of the clip that is proximate to a first end of the clip. A portion of the surface pattern is attached to a top surface of a terminal pad of the lead. The clip includes a die contact area on the bottom surface of the clip that is proximate to a second end of the clip. The die contact area of the clip is attached to a top contact on the semiconductor die. The surface pattern has a length in a longitudinal direction of the clip in a direction parallel with a plane of the bottom surface of the die pad that is greater than a length of the top surface of the terminal pad of the lead.

An integrated circuit package includes a leadframe with a die pad and a lead. A semiconductor die is attached to a top surface of the die pad. A clip has a lead contact area with a surface pattern on a bottom surface of the clip that is proximate to a first end of the clip. A portion of the surface pattern is attached to a top surface of a terminal pad of the lead. The clip includes a die contact area on the bottom surface of the clip that is proximate to a second end of the clip. The die contact area of the clip is attached to a top contact on the semiconductor die. The surface pattern has a length in a longitudinal direction of the clip in a direction parallel with a plane of the bottom surface of the die pad that is greater than a length of the top surface of the terminal pad of the lead.