A photocoupler of an embodiment includes an input terminal, an output terminal, a first MOSFET, a second MOSFET, a semiconductor light receiving element, a semiconductor light emitting element, and a resin layer. The first MOSFET is joined onto the third lead. The second MOSFET is joined onto the fourth lead. The semiconductor light receiving element is joined to each of the first junction region and the second junction region. The semiconductor light receiving element includes a light receiving region provided in a central part of a surface on opposite side from a surface joined to the first and second MOSFET. The resin layer seals the first and second MOSFETs, the semiconductor light receiving element, the semiconductor light emitting element, an upper surface and a side surface of the input terminal, and an upper surface and a side surface of the output terminal.

A photocoupler of an embodiment includes an input terminal, an output terminal, a first MOSFET, a second MOSFET, a semiconductor light receiving element, a semiconductor light emitting element, and a resin layer. The first MOSFET is joined onto the third lead. The second MOSFET is joined onto the fourth lead. The semiconductor light receiving element is joined to each of the first junction region and the second junction region. The semiconductor light receiving element includes a light receiving region provided in a central part of a surface on opposite side from a surface joined to the first and second MOSFET. The resin layer seals the first and second MOSFETs, the semiconductor light receiving element, the semiconductor light emitting element, an upper surface and a side surface of the input terminal, and an upper surface and a side surface of the output terminal.

A printed circuit board includes a first insulating layer; an external connection pad embedded in a first surface of the first insulating layer and having a first externally exposed surface disposed at substantially the same level as the first surface of the first insulating layer; a second insulating layer disposed on a second surface of the first insulating layer and having a first surface in contact with the second surface of the first insulating layer; and a first wiring pattern embedded in the second insulating layer and exposed from the first surface of the second insulating layer to be in contact with a second externally exposed surface of the external connection pad opposing the first externally exposed surface.

A printed circuit board includes a first insulating layer; an external connection pad embedded in a first surface of the first insulating layer and having a first externally exposed surface disposed at substantially the same level as the first surface of the first insulating layer; a second insulating layer disposed on a second surface of the first insulating layer and having a first surface in contact with the second surface of the first insulating layer; and a first wiring pattern embedded in the second insulating layer and exposed from the first surface of the second insulating layer to be in contact with a second externally exposed surface of the external connection pad opposing the first externally exposed surface.

A magnetic sensor includes a semiconductor element, a lead frame, a bonding wire, and a package. The lead frame includes a die pad to which the semiconductor element is attached and an external connection lead. The bonding wire connects the external connection lead with the semiconductor element. The package seals the semiconductor element, the die pad, the external connection pad, and the bonding wire. The package is made of epoxy-based resin. The lead frame further includes a projecting portion extending from the die pad, the projecting portion is exposed from the package at a position different from a position of the external connection lead, and a partial surface of the projecting portion which contacts with the package is made of material having a higher ionization tendency than an ionization tendency of silver.

A magnetic sensor includes a semiconductor element, a lead frame, a bonding wire, and a package. The lead frame includes a die pad to which the semiconductor element is attached and an external connection lead. The bonding wire connects the external connection lead with the semiconductor element. The package seals the semiconductor element, the die pad, the external connection pad, and the bonding wire. The package is made of epoxy-based resin. The lead frame further includes a projecting portion extending from the die pad, the projecting portion is exposed from the package at a position different from a position of the external connection lead, and a partial surface of the projecting portion which contacts with the package is made of material having a higher ionization tendency than an ionization tendency of silver.

A semiconductor package is disclosed. The disclosed semiconductor package includes a substrate having bonding pads at an upper surface thereof, a lower semiconductor chip, at least one upper semiconductor chip disposed on the lower semiconductor chip, and a dam structure having a closed loop shape surrounding the lower semiconductor chip. The dam structure includes narrow and wide dams disposed between the lower semiconductor chip and the bonding pads. The wide dam has a greater inner width than the narrow dam. The semiconductor packages further includes an underfill disposed inside the dam structure and being filled between the substrate and the lower semiconductor chip.

A semiconductor package is disclosed. The disclosed semiconductor package includes a substrate having bonding pads at an upper surface thereof, a lower semiconductor chip, at least one upper semiconductor chip disposed on the lower semiconductor chip, and a dam structure having a closed loop shape surrounding the lower semiconductor chip. The dam structure includes narrow and wide dams disposed between the lower semiconductor chip and the bonding pads. The wide dam has a greater inner width than the narrow dam. The semiconductor packages further includes an underfill disposed inside the dam structure and being filled between the substrate and the lower semiconductor chip.

A method of manufacturing a lead frame includes providing an electrically conductive layer having a plurality of holes at a top surface. The plurality of holes form a structure of leads and a die pad on the electrically conductive layer. The plurality of holes are filled with a non-conductive material. Next; an electrically conductive foil is attached on the top surface of the electrically conductive layer and the non-conductive epoxy material. The, the electrically conductive foil is etched to create a network of leads, die pad, bus lines, dam bars and tie lines, wherein the bus lines connect the leads to the dam bar, the dam bar is connected to the tie line and the tie line is connected to the die pad.

A lead frame including a die pad having a first surface and a second surface opposite the first surface, a lead having a third surface flush with the first surface and a fourth surface opposite the third surface, and a link portion connecting the die pad and the lead, wherein the link portion includes a first portion that surrounds the die pad between the die pad and the lead in a plan view, wherein the first portion has a fifth surface flush with the first surface and the third surface, and has a sixth surface opposite the fifth surface, wherein the second surface is closer to a plane containing the first surface, the third surface, and the fifth surface than is the fourth surface, and wherein the sixth surface is closer to the plane containing the first surface, the third surface, and the fifth surface than is the second surface.