A semiconductor device includes: a semiconductor chip; a case having a frame portion that has an inner wall portion surrounding an housing area in which the semiconductor chip is disposed; a buffer member provided on at last part of the inner wall portion of the case on a side of the housing area; a low expansion member provided on said at least part of the inner wall portion with the buffer member interposed therebetween on the side of the housing area; and a sealing member that seals the housing area, wherein the buffer member has a smaller elastic modulus than the case and the sealing member, and wherein the low expansion member has a smaller linear expansion coefficient than the case and the sealing member.

A semiconductor device includes: a semiconductor chip; a case having a frame portion that has an inner wall portion surrounding an housing area in which the semiconductor chip is disposed; a buffer member provided on at last part of the inner wall portion of the case on a side of the housing area; a low expansion member provided on said at least part of the inner wall portion with the buffer member interposed therebetween on the side of the housing area; and a sealing member that seals the housing area, wherein the buffer member has a smaller elastic modulus than the case and the sealing member, and wherein the low expansion member has a smaller linear expansion coefficient than the case and the sealing member.

A semiconductor package is disclosed. The disclosed semiconductor package includes a substrate having bonding pads at an upper surface thereof, a lower semiconductor chip, at least one upper semiconductor chip disposed on the lower semiconductor chip, and a dam structure having a closed loop shape surrounding the lower semiconductor chip. The dam structure includes narrow and wide dams disposed between the lower semiconductor chip and the bonding pads. The wide dam has a greater inner width than the narrow dam. The semiconductor packages further includes an underfill disposed inside the dam structure and being filled between the substrate and the lower semiconductor chip.

A semiconductor package is disclosed. The disclosed semiconductor package includes a substrate having bonding pads at an upper surface thereof, a lower semiconductor chip, at least one upper semiconductor chip disposed on the lower semiconductor chip, and a dam structure having a closed loop shape surrounding the lower semiconductor chip. The dam structure includes narrow and wide dams disposed between the lower semiconductor chip and the bonding pads. The wide dam has a greater inner width than the narrow dam. The semiconductor packages further includes an underfill disposed inside the dam structure and being filled between the substrate and the lower semiconductor chip.

A package structure is provided. The package structure includes a die, a lead frame, and a conductive glue. The lead frame includes a die pad and a retaining wall structure. The die pad is configured to support the die, and the retaining wall structure surrounds the die. The conductive glue is disposed between the die and the lead frame.

A package structure is provided. The package structure includes a die, a lead frame, and a conductive glue. The lead frame includes a die pad and a retaining wall structure. The die pad is configured to support the die, and the retaining wall structure surrounds the die. The conductive glue is disposed between the die and the lead frame.

A semiconductor package is disclosed. The disclosed semiconductor package includes a substrate having bonding pads at an upper surface thereof, a lower semiconductor chip, at least one upper semiconductor chip disposed on the lower semiconductor chip, and a dam structure having a closed loop shape surrounding the lower semiconductor chip. The dam structure includes narrow and wide dams disposed between the lower semiconductor chip and the bonding pads. The wide dam has a greater inner width than the narrow dam. The semiconductor packages further includes an underfill disposed inside the dam structure and being filled between the substrate and the lower semiconductor chip.

A semiconductor package is disclosed. The disclosed semiconductor package includes a substrate having bonding pads at an upper surface thereof, a lower semiconductor chip, at least one upper semiconductor chip disposed on the lower semiconductor chip, and a dam structure having a closed loop shape surrounding the lower semiconductor chip. The dam structure includes narrow and wide dams disposed between the lower semiconductor chip and the bonding pads. The wide dam has a greater inner width than the narrow dam. The semiconductor packages further includes an underfill disposed inside the dam structure and being filled between the substrate and the lower semiconductor chip.

A semiconductor structure is provided. The semiconductor structure includes a base, a seed layer, a compound semiconductor layer, a gate structure, a source structure, a drain structure, and a conductive paste. The seed layer is disposed on the base. The compound semiconductor layer is disposed on the seed layer. The gate structure is disposed on the compound semiconductor layer. The source structure and the drain structure are disposed on both sides of the gate structure. In addition, the conductive paste is disposed between the base and a lead frame, and the conductive paste extends to the side surface of the base.

A semiconductor structure is provided. The semiconductor structure includes a base, a seed layer, a compound semiconductor layer, a gate structure, a source structure, a drain structure, and a conductive paste. The seed layer is disposed on the base. The compound semiconductor layer is disposed on the seed layer. The gate structure is disposed on the compound semiconductor layer. The source structure and the drain structure are disposed on both sides of the gate structure. In addition, the conductive paste is disposed between the base and a lead frame, and the conductive paste extends to the side surface of the base.