A receiver includes a first T-coil circuit at an input of the receiver and configured to receive an input signal, a termination impedance coupled to the first T-coil circuit and configured to match an impedance of a transmission line coupled to the first T-coil circuit, and an amplifier including a first input and a second input and configured to amplify a differential signal at the first and second inputs, a calibration switch coupled to the amplifier and configured to selectively electrically connect or disconnect the first and second inputs of the amplifier, and a first receive switch configured to selectively electrically connect or disconnect a center node of the first T-coil circuit and the amplifier.

A differential amplifier circuit generates a first current and a second current having a current difference obtained by amplifying a voltage difference between an input voltage and a reference voltage. An output stage supplies current proportional to the first current to an output node. A current conversion circuit discharges current proportional to the second current from the output node. After connecting the output node to a ground node in response to a reset signal, a latch circuit disconnects the output node from the ground node after reset cancellation. Thereafter, when voltage at the output node rises from the ground voltage in a case where a level relationship between the input voltage and the reference voltage is reversed from a reset cancellation time point, the latch circuit fixes the voltage at the output node to a power supply voltage by a positive feedback latch operation.

A multichannel magnetic field sensor including a plurality of magnetic field sensing elements includes a multiplexed signal path. A front end amplifier is coupled to receive a first magnetic field signal during a first time interval and a second magnetic field signal during a second time interval. A first low pass filter processes the amplified signal during the first time interval and a second low pass filter processes the amplified signal during the second time interval. A sinc filter is coupled to receive the first low pass filtered signal during the first time interval and the second low pass filtered signal during the second time interval. A Schmitt trigger circuit includes a comparator to process the sinc filter output signal and to generate a first comparator output signal during the first time interval and a second comparator output signal is provided during the second time interval.

To provide a variable reference voltage source for which a measuring instrument is unnecessary for calibration on the outside. A variable reference voltage source that generates a variable reference voltage corresponding to setting data set from outside includes a control unit including a calibration control unit that controls operation for calibrating an offset and a predetermined unit voltage inside the variable reference voltage source and an output control unit that controls operation for outputting the variable reference voltage, a reference voltage unit that outputs a reference voltage Vref, and an integrated-voltage generating unit that repeats, when the calibration control unit controls the operation, an integrating operation until an integrated voltage obtained by integrating the predetermined unit voltage becomes equal to the reference voltage Vref and outputs, when the output control unit controls the operation, the variable reference voltage corresponding to the setting data.

A difference amplifier can be used for providing an amplified representation of a sensed current through a load device. A separate signal path can be used to provide fast fault detection, without requiring use of the difference amplifier. For example, a voltage scaling circuit can be used to scale a differential input signal indicative of the load current. The scaled representation can then be compared against a specified threshold corresponding to a fault current value. In this manner, a high-speed low-voltage comparator can be used to provide detection of a fault current that otherwise exceeds an input range of the difference amplifier, where the difference amplifier is used separately for precision current monitoring. As an illustrative example, such a scheme can provide fault detection even when an input of the difference amplifier is saturated.

A differential amplifier circuit generates a first current and a second current having a current difference obtained by amplifying a voltage difference between an input voltage and a reference voltage. An output stage supplies current proportional to the first current to an output node. A current conversion circuit discharges current proportional to the second current from the output node. After connecting the output node to a ground node in response to a reset signal, a latch circuit disconnects the output node from the ground node after reset cancellation. Thereafter, when voltage at the output node rises from the ground voltage in a case where a level relationship between the input voltage and the reference voltage is reversed from a reset cancellation time point, the latch circuit fixes the voltage at the output node to a power supply voltage by a positive feedback latch operation.

In some embodiments, a circuit includes: a first chopping circuit configured to receive an input signal and generate a modulated signal responsive to the input signal; first and second input capacitors selectively coupled to receive a modulated signal or a common-mode voltage; an amplifier having an input and an output, the input coupled to the first and second input capacitors; an auto-zeroing circuit comprising one or more auto-zeroing feedback capacitors selectively coupled between the amplifier input and output; a gain selection circuit comprising one or more gain selection feedback capacitors coupled to the amplifier input and selectively coupled to the amplifier output or the common-mode voltage; an offset compensation circuit comprising one or more offset capacitors coupled to the amplifier input and selectively coupled to a reference voltage or the common-mode voltage; and a second chopping circuit configured to generate a demodulated signal responsive to the amplifier output.

A receiving circuit and an optical receiver including the receiving circuit are disclosed. The receiving circuit includes first and second input terminals, a FET, first and second TIA circuits, and a control circuit. The first and second input terminals each receive a current signal. The FET has first and second current terminals respectively connected to the first and second input terminals, and a control terminal. The first and second TIA circuits respectively are connected to the first and second current terminals, and convert the current signals to first and second voltage signals. The control circuit generates a control signal for application to the FET control terminal in accordance with a difference between the first and second voltage signals. The optical receiver includes the receiving circuit and each of first and second photodetectors for respectively supplying first and second current signals to the first and second input terminals of the receiver.

An amplifying circuit, which can operate in one of a sample mode and a hold mode, comprising: an amplifier; a current providing circuit, configured to provide a first bias current to the amplifier in a power saving time interval when the amplifying circuit operates in the sample mode, and configured to provide a second bias current to the amplifier when the amplifying circuit operates in the hold mode; wherein the first bias current is smaller than the second bias current.

In some embodiments, a circuit includes: a first chopping circuit configured to receive an input signal and generate a modulated signal responsive to the input signal; first and second input capacitors selectively coupled to receive a modulated signal or a common-mode voltage; an amplifier having an input and an output, the input coupled to the first and second input capacitors; an auto-zeroing circuit comprising one or more auto-zeroing feedback capacitors selectively coupled between the amplifier input and output; a gain selection circuit comprising one or more gain selection feedback capacitors coupled to the amplifier input and selectively coupled to the amplifier output or the common-mode voltage; an offset compensation circuit comprising one or more offset capacitors coupled to the amplifier input and selectively coupled to a reference voltage or the common-mode voltage; and a second chopping circuit configured to generate a demodulated signal responsive to the amplifier output.