Methods for depositing oxide thin films, such as metal oxide, metal silicates, silicon oxycarbide (SiOC) and silicon oxycarbonitride (SiOCN) thin films, on a substrate in a reaction space are provided. The methods can include at least one plasma enhanced atomic layer deposition (PEALD) cycle including alternately and sequentially contacting the substrate with a first reactant that comprises oxygen and a component of the oxide, and a second reactant comprising reactive species that does not include oxygen species. In some embodiments the plasma power used to generate the reactive species can be selected from a range to achieve a desired step coverage or wet etch rate ratio (WERR) for films deposited on three dimensional features. In some embodiments oxide thin films are selectively deposited on a first surface of a substrate relative to a second surface, such as on a dielectric surface relative to a metal or metallic surface.

Method of deposition on a substrate of a dielectric film by introducing into a reaction chamber a vapor of a precursor selected from the group consisting of Zr(MeCp)(NMe.sub.2).sub.3, Zr(EtCp)(NMe.sub.2).sub.3, ZrCp(NMe.sub.2).sub.3, Zr(MeCp)(NEtMe).sub.3, Zr(EtCp)(NEtMe).sub.3, ZrCp(NEtMe).sub.3, Zr(MeCp)(NEt.sub.2).sub.3, Zr(EtCp)(NEt.sub.2).sub.3, ZrCp(NEt.sub.2).sub.3, Zr(iPr.sub.2Cp)(NMe.sub.2).sub.3, Zr(tBu.sub.2Cp)(NMe.sub.2).sub.3, Hf(MeCp)(NMe.sub.2).sub.3, Hf(EtCp)(NMe.sub.2).sub.3, HfCp(NMe.sub.2).sub.3, Hf(MeCp)(NEtMe).sub.3, Hf(EtCp)(NEtMe).sub.3, HfCp(NEtMe).sub.3, Hf(MeCp)(NEt.sub.2).sub.3, Hf(EtCp)(NEt.sub.2).sub.3, HfCp(NEt.sub.2).sub.3, Hf(iPr.sub.2Cp)(NMe.sub.2).sub.3, Hf(tBu.sub.2Cp)(NMe.sub.2).sub.3, and mixtures thereof; and depositing the dielectric film on the substrate.

A vertical metal-insulator-metal (MIM) capacitor is formed within multiple layers of a multi-level metal interconnect system of a chip. The vertical MIM capacitor has a first electrode, a second electrode, and a high-k capacitor dielectric material disposed therebetween. The dielectric constant of the capacitor dielectric material is greater than the dielectric constant of interlayer dielectric (ILD) material. After ILD is removed from between the vertically-oriented, interdigitated portions of the first and second electrodes, a capacitor dielectric material having a dielectric constant greater than the MD dielectric material is disposed therebetween.

Method of deposition on a substrate of a dielectric film by introducing into a reaction chamber a vapor of a precursor selected from the group consisting of Zr(MeCp)(NMe.sub.2).sub.3, Zr(EtCp)(NMe.sub.2).sub.3, ZrCp(NMe.sub.2).sub.3, Zr(MeCp)(NEtMe).sub.3, Zr(EtCp)(NEtMe).sub.3, ZrCp(NEtMe).sub.3, Zr(MeCp)(NEt.sub.2).sub.3, Zr(EtCp)(NEt.sub.2).sub.3, ZrCp(NEt.sub.2).sub.3, Zr(iPr.sub.2Cp)(NMe.sub.2).sub.3, Zr(tBu.sub.2Cp)(NMe.sub.2).sub.3, Hf(MeCp)(NMe.sub.2).sub.3, Hf(EtCp)(NMe.sub.2).sub.3, HfCp(NMe.sub.2).sub.3, Hf(MeCp)(NEtMe).sub.3, Hf(EtCp)(NEtMe).sub.3, HfCp(NEtMe).sub.3, Hf(MeCp)(NEt.sub.2).sub.3, Hf(EtCp)(NEt.sub.2).sub.3, HfCp(NEt.sub.2).sub.3, Hf(iPr.sub.2Cp)(NMe.sub.2).sub.3, Hf(tBu.sub.2Cp)(NMe.sub.2).sub.3, and mixtures thereof; and depositing the dielectric film on the substrate.

Metal silicates or phosphates are deposited on a heated substrate by the reaction of vapors of alkoxysilanols or alkylphosphates along with reactive metal amides, alkyls or alkoxides. For example, vapors of tris(tert-butoxy)silanol react with vapors of tetrakis(ethylmethylamido) hafnium to deposit hafnium silicate on surfaces heated to 300 C. The product film has a very uniform stoichiometry throughout the reactor. Similarly, vapors of diisopropylphosphate react with vapors of lithium bis(ethyldimethylsilyl)amide to deposit lithium phosphate films on substrates heated to 250 C. Supplying the vapors in alternating pulses produces these same compositions with a very uniform distribution of thickness and excellent step coverage.

A method of manufacturing a semiconductor device includes forming a lower metal layer, forming an interfacial oxide film on the lower metal layer, providing a metal precursor on the interfacial oxide film at a first pressure to adsorb the metal precursor into the interfacial oxide film, performing a first purge process at a second pressure to remove the unadsorbed metal precursor, the second pressure lower than the first pressure, providing an oxidizing gas at the first pressure to react with the adsorbed metal precursor, performing a second purge process at the second pressure to remove the unreacted oxidizing gas and form a dielectric film, and forming an upper metal layer on the dielectric film.

A vertical metal-insulator-metal (MIM) capacitor is formed within multiple layers of a multi-level metal interconnect system of a chip. The vertical MIM capacitor has a first electrode, a second electrode, and a high-k capacitor dielectric material disposed therebetween. The dielectric constant of the capacitor dielectric material is greater than the dielectric constant of interlayer dielectric (ILD) material. After ILD is removed from between the vertically-oriented, interdigitated portions of the first and second electrodes, a capacitor dielectric material having a dielectric constant greater than the MD dielectric material is disposed therebetween.

A method to form a semiconductor structure with an active region and a compatible dielectric layer is described. In one embodiment, a semiconductor structure has a dielectric layer comprised of an oxide of a first semiconductor material, wherein a second (and compositionally different) semiconductor material is formed between the dielectric layer and the first semiconductor material. In another embodiment, a portion of the second semiconductor material is replaced with a third semiconductor material in order to impart uniaxial strain to the lattice structure of the second semiconductor material.

Embodiments of the disclosure generally provide methods of forming a capacitor with high capacitance and low leakage as well as a good interface control for thin film transistor (TFT) applications. In one embodiment, a thin film transistor structure includes a capacitor formed in a thin film transistor device. The capacitor further includes a common electrode disposed on a substrate, a dielectric layer formed on the common electrode and a pixel electrode formed on the dielectric layer. An interface protection layer formed between the common electrode and the dielectric layer, or between the dielectric layer and the pixel electrode. A gate insulating layer fabricated by a high-k material may also be utilized in the thin film transistor structure.

A method to form a semiconductor structure with an active region and a compatible dielectric layer is described. In one embodiment, a semiconductor structure has a dielectric layer comprised of an oxide of a first semiconductor material, wherein a second (and compositionally different) semiconductor material is formed between the dielectric layer and the first semiconductor material. In another embodiment, a portion of the second semiconductor material is replaced with a third semiconductor material in order to impart uniaxial strain to the lattice structure of the second semiconductor material.