Embodiments described and discussed herein provide methods for selectively depositing a metal oxides on a substrate. In one or more embodiments, methods for forming a metal oxide material includes positioning a substrate within a processing chamber, where the substrate has passivated and non-passivated surfaces, exposing the substrate to a first metal alkoxide precursor to selectively deposit a first metal oxide layer on or over the non-passivated surface, and exposing the substrate to a second metal alkoxide precursor to selectively deposit a second metal oxide layer on the first metal oxide layer. The method also includes sequentially repeating exposing the substrate to the first and second metal alkoxide precursors to produce a laminate film containing alternating layers of the first and second metal oxide layers. Each of the first and second metal alkoxide precursors contain different types of metals which are selected from titanium, zirconium, hafnium, aluminum, or lanthanum.

A substrate processing apparatus includes: a chamber; and a processing gas supply unit connected to the chamber via a processing gas supply flow path and configured to supply a processing gas. The processing gas supply unit includes a raw material cartridge that includes a raw material tank that accommodates a porous member containing a metal-organic framework adsorbed with gas molecules of a raw material of the processing gas; a main body configured to communicate the raw material tank and the processing gas supply flow path with each other when the raw material cartridge is attached; and a desorption mechanism configured to desorb the gas molecules of the raw material of the processing gas and allow the gas molecules to flow out as the processing gas to the processing gas supply flow path while the raw material cartridge is attached to the main body.

Provided is an apparatus for processing a substrate, which includes a chamber having a processing space in which a process of depositing a thin-film on a substrate is performed and a structure which is installed to expose at least one surface to the processing space and in which a coating layer made of a polymer forming at least one of covalent bond and double bond at an end tail is formed on the surface exposed to the processing space.

Thus, the substrate processing apparatus in accordance with an exemplary embodiment may restrict or prevent particle generation and substrate pollution generation caused by a thin-film deposited in the chamber. Also, a period of cleaning the chamber and a structure or a component in the chamber may be extended. Thus, a product yield rate and an apparatus operation efficiency may improve.

A structure is manufactured by forming a mask that has an opening pattern on a fine recessed and projected structure of a substrate having the fine recessed and projected structure with an average period of 1 μm or less on a surface thereof, etching the surface of the substrate from a side of the mask to form a recessed portion which has an opening greater than the average period of the fine recessed and projected structure according to the opening pattern of the mask, the recessed portion having a depth equal to or greater than double a difference in height between recesses and projections of the fine recessed and projected structure, and then removing the mask.

An electrical device includes a substrate, a dielectric layer supported by the substrate, and an electrically conductive vertical interconnect extending through the dielectric layer. The dielectric layer may be formed at low-temperature below the thermal degradation temperature of thermally-sensitive material in the device. The dielectric layer may be a low-stress layer that imparts no stress or less stress than a failure stress of fragile material in the device. The dielectric layer may be formed during a processing step to planarize the electrical device at that step. The vertical interconnect may be diffusion bondable with another opposing interconnect at a low-temperature below the thermal degradation temperature of thermally-sensitive material in the device. The vertical interconnect may have a coefficient of thermal expansion (CTE) that is greater than a CTE of the dielectric layer to facilitate 3D-integration.

The present disclosure provides a high electron mobility transistor including a channel layer; a barrier layer on the channel layer and configured to induce formation of a 2-dimensional electron gas (2DEG) to the channel layer; a p-type semiconductor layer on the barrier layer; a first passivation layer on the barrier layer and including a quaternary material of Al, Ga, O, and N; a gate electrode on the p-type semiconductor layer; and a source electrode and a drain electrode provided on both sides of the barrier layer and separated from the gate electrode.

Provided are electronic devices and methods of manufacturing the same. An electronic device may include a substrate, a gate electrode on the substrate, a ferroelectric layer between the substrate and the gate electrode, and a carbon layer between the substrate and the ferroelectric layer. The carbon layer may have an sp.sup.2 bonding structure.

A semiconductor device and method for manufacturing the semiconductor device are disclosed. Specifically, the semiconductor device may include a charge trapping layer with improved retention and speed for VNAND applications. The charge trapping layer may comprise an aluminum nitride (AlN) or aluminum oxynitride (AlON) layer.

A method for forming a semiconductor structure includes following operations. A first substrate including a first side, a second side opposite to the first side, and a metallic pad disposed over the first side is received. A dielectric structure including a first trench directly above the metallic pad is formed. A second trench is formed in the dielectric structure and a portion of the first substrate. A sacrificial layer is formed to fill the first trench and the second trench. A third trench is formed directly above the metallic pad. A barrier ring and a bonding structure are formed in the third trench. A bonding layer is disposed to bond the first substrate to a second substrate. A portion of the second side of the first substrate is removed to expose the sacrificial layer. The sacrificial layer is removed by an etchant.

A method includes placing a semiconductor substrate in a deposition chamber, wherein the semiconductor substrate includes a trench, and performing an atomic layer deposition (ALD) process to deposit a dielectric material within the trench, including flowing a first precursor of the dielectric material into the deposition chamber as a gas phase; flowing a second precursor of the dielectric material into the deposition chamber as a gas phase; and controlling the pressure and temperature within the deposition chamber such that the second precursor condenses on surfaces within the trench as a liquid phase of the second precursor, wherein the liquid phase of the second precursor has capillarity.