H01L21/02192

METHOD FOR MANUFACTURING METAL FLUORIDE-CONTAINING ORGANIC POLYMER FILM, PATTERNING METHOD, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

A method for manufacturing a metal fluoride-containing organic polymer film includes forming an organic polymer film on a base body. The method includes exposing the organic polymer film to an organometallic compound containing a first metal, thereby infiltrating the organic polymer film with the organometallic compound. The method includes exposing the organic polymer film infiltrated with the organometallic compound to hydrogen fluoride, thereby providing a fluoride of the first metal in the organic polymer film.

EPITAXIAL GALLIUM NITRIDE ALLOY FERROELECTRONICS
20230070465 · 2023-03-09 ·

A method of fabricating a heterostructure includes providing a substrate, and implementing a non-sputtered, epitaxial growth procedure at a growth temperature to form a wurtzite structure supported by the substrate. The wurtzite structure includes an alloy of gallium nitride. The non-sputtered, epitaxial growth procedure is configured to incorporate a group IIIB element into the alloy. The wurtzite structure exhibits a breakdown field strength greater than a ferroelectric coercive field strength of the wurtzite structure.

Layer stack for display applications

Embodiments of the present disclosure generally relate to a layer stack including a high K dielectric layer formed over a first dielectric layer and a metal electrode. The high K dielectric layer has a K value of 20 or higher and may be formed as a part of a capacitor, a gate insulating layer, or any suitable insulating layer in electronic devices, such as display devices. The layer stack includes a second dielectric layer disposed on the first dielectric layer and the metal layer, and the high K dielectric layer containing zirconium dioxide or hafnium dioxide disposed on the second dielectric layer. The second dielectric layer provides a homogenous surface on which the high K dielectric layer is formed. The homogeneous surface enables the high K dielectric material to be deposited uniformly thereover, resulting in a uniform thickness profile.

Epitaxial oxide high electron mobility transistor
11637013 · 2023-04-25 · ·

The present disclosure describes epitaxial oxide high electron mobility transistors (HEMTs). In some embodiments, a HEMT comprises: a substrate; a template layer on the substrate; a first epitaxial semiconductor layer on the template layer; and a second epitaxial semiconductor layer on the first epitaxial semiconductor layer. The template layer can comprise crystalline metallic Al(111). The first epitaxial semiconductor layer can comprise (Al.sub.xGa.sub.1-x).sub.yO.sub.z, wherein 0≤x≤1, 1≤y≤3, and 2≤z≤4, wherein the (Al.sub.xGa.sub.1-x).sub.yO.sub.z comprises a Pna21 space group, and wherein the (Al.sub.xGa.sub.1-x).sub.yO.sub.z comprises a first conductivity type formed via polarization. The second epitaxial semiconductor layer can comprise a second oxide material.

HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING AN ISOLATION REGION
20230163022 · 2023-05-25 ·

A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.

CERIUM-DOPED FERROELECTRIC MATERIALS AND RELATED DEVICES AND METHODS

Ferroelectric materials and more particularly cerium-doped ferroelectric materials and related devices and methods are disclosed. Aspects of the present disclosure relate to ferroelectric layers of hafnium-zirconium-oxide (HZO) doped with cerium that enable reliable ferroelectric fabrication processes and related structures with significantly improved cycling endurance performance. Such doping in ferroelectric layers also provides the capability to modulate polarization to achieve a desired operation voltage range. Doping concentrations of cerium in HZO films are disclosed with ranges that provide a stabilized polar orthorhombic phase in resulting films, thereby promoting ferroelectric capabilities. Exemplary fabrication techniques for doping cerium in HZO films as well as exemplary device structures including metal-ferroelectric-metal (MFM) and metal-ferroelectric-insulator-semiconductor (MFIS) structures are also disclosed.

Methods for depositing an oxide film on a substrate by a cyclical deposition process and related device structures
11469098 · 2022-10-11 · ·

A method for depositing an oxide film on a substrate by a cyclical deposition is disclosed. The method may include: depositing a metal oxide film over the substrate utilizing at least one deposition cycle of a first sub-cycle of the cyclical deposition process; and depositing a silicon oxide film directly on the metal oxide film utilizing at least one deposition cycle of a second sub-cycle of the cyclical deposition process. Semiconductor device structures including an oxide film deposited by the methods of the disclosure are also disclosed.

EPITAXIAL OXIDE HIGH ELECTRON MOBILITY TRANSISTOR
20230143918 · 2023-05-11 · ·

The present disclosure describes epitaxial oxide high electron mobility transistors (HEMTs). In some embodiments, a HEMT comprises: a substrate; a first epitaxial semiconductor layer on the substrate; and a second epitaxial semiconductor layer on the first epitaxial semiconductor layer. The first epitaxial semiconductor layer can comprise a first oxide material, wherein the first oxide material can comprise a first polar material with an orthorhombic, tetragonal or trigonal crystal symmetry, and wherein the first oxide material can comprise a first conductivity type formed via polarization. The second epitaxial semiconductor layer can comprise a second oxide material.

HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE COMPRISING AN ISOLATION REGION
20170372946 · 2017-12-28 ·

A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.

SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME
20230207658 · 2023-06-29 · ·

A semiconductor structure includes a substrate and a gate stack structure located on the substrate. The gate stack structure includes: a high-K dielectric layer, a first barrier layer in contact with the high-K dielectric layer, a work function layer located on a side of the high-K dielectric layer away from the substrate, and a gate electrode layer located on a side of the work function layer away from the substrate. The first barrier layer contains the same metal element as the high-K dielectric layer.