Patent classifications
H01L21/0228
Varying temperature anneal for film and structures formed thereby
Semiconductor device structures having dielectric features and methods of forming dielectric features are described herein. In some examples, the dielectric features are formed by an ALD process followed by a varying temperature anneal process. The dielectric features can have high density, low carbon concentration, and lower k-value. The dielectric features formed according to the present disclosure has improved resistance against etching chemistry, plasma damage, and physical bombardment in subsequent processes while maintaining a lower k-value for target capacitance efficiency.
Gas phase etch with controllable etch selectivity of metals
A method for the dry removal of a material on a microelectronic workpiece is described. The method includes receiving a substrate having a working surface exposing a metal layer and having at least one other material exposed or underneath the metal layer; and differentially etching the metal layer relative to the other material by exposing the substrate to a controlled gas-phase environment containing an anhydrous halogen compound.
Graphene LHFETS (lateral heterostructure field effect transistors) on SI compatible with CMOS BEOL process
A field effect transistor includes a substrate, a passivation layer on the substrate forming a passivated substrate, wherein the passivation layer is inert to XeF.sub.2, and a graphene lateral heterostructure field effect transistor (LHFET) on the passivated substrate.
FERROELECTRIC THIN FILM, ELECTRONIC ELEMENT USING SAME, AND METHOD FOR MANUFACTURING FERROELECTRIC THIN FILM
It is an object to provide a ferroelectric thin film having much higher ferroelectric properties than conventional Sc-doped ferroelectric thin film constituted by aluminum nitride and also having stability when applied to practical use, and also to provide an electronic device using the same.
There are provided a ferroelectric thin film represented by a chemical formula M1.sub.1-XM2.sub.XN, wherein M1 is at least one element selected from Al and Ga, M2 is at least one element selected from Mg, Sc, Yb, and Nb, and X is within a range of 0 or more and 1 or less, and also an electronic device using the same.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device with a small variation in characteristics is provided. A semiconductor device includes an oxide, a first conductor and a second conductor over the oxide, a first insulator over the first conductor, a second insulator over the second conductor, a third insulator over the first insulator and the second insulator, a fourth insulator over the third insulator, a fifth insulator that is over the oxide and placed between the first conductor and the second conductor, a sixth insulator over the fifth insulator, and a third conductor over the sixth insulator. The third conductor includes a region overlapping the oxide. The fifth insulator includes a region in contact with the oxide, the first conductor, the second conductor, and each of the first insulator to the fourth insulator. The fifth insulator contains nitrogen, oxygen, and silicon.
METHODS, APPARATUS, AND SYSTEMS FOR MAINTAINING FILM MODULUS WITHIN A PREDETERMINED MODULUS RANGE
Embodiments of the present disclosure generally relate to methods, apparatus, and systems for maintaining film modulus within a predetermined modulus range. In one implementation, a method of processing substrates includes introducing one or more processing gases to a processing volume of a processing chamber, and depositing a film on a substrate supported on a substrate support disposed in the processing volume. The method includes supplying simultaneously a first radiofrequency (RF) power and a second RF power to one or more bias electrodes of the substrate support. The first RF power includes a first RF frequency and the second RF power includes a second RF frequency that is less than the first RF frequency. A modulus of the film is maintained within a predetermined modulus range.
FILM DEPOSITION METHOD AND ELEMENT INCLUDING FILM DEPOSITED BY THE FILM DEPOSITION METHOD
A film deposition method may include preparing a non-planar substrate including a first surface, a second surface, and an inclined surface between the first surface and the second surface; depositing a film having a thickness deviation on the first surface, the second surface, and the inclined surface; and etching the film deposited on the first surface, the second surface, and the inclined surface. A height of the second surface may be different than a height of the first surface.
FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH DIELECTRIC ISOLATION STRUCTURE
A method for forming a semiconductor device is provided. The method includes forming a semiconductor protruding structure over a substrate and surrounding the semiconductor protruding structure with an insulating layer. The method also includes forming a dielectric layer over the insulating layer. The method further includes partially removing the dielectric layer and insulating layer using a planarization process. As a result, topmost surfaces of the semiconductor protruding structure, the insulating layer, and the dielectric layer are substantially level with each other. In addition, the method includes forming a protective layer to cover the topmost surfaces of the dielectric layer. The method includes recessing the insulating layer after the protective layer is formed such that the semiconductor protruding structure and a portion of the dielectric layer protrude from a top surface of a remaining portion of the insulating layer.
Formation of SiOC thin films
Methods for depositing silicon oxycarbide (SiOC) thin films on a substrate in a reaction space are provided. The methods can include at least one plasma enhanced atomic layer deposition (PEALD) cycle including alternately and sequentially contacting the substrate with a silicon precursor that does not comprise nitrogen and a second reactant that does not include oxygen. In some embodiments the methods allow for the deposition of SiOC films having improved acid-based wet etch resistance.
Semiconductor structure
A semiconductor structure is provided. The semiconductor structure includes a base substrate including a plurality of non-device regions; a middle fin structure and an edge fin disposed around the middle fin structure on the base substrate between adjacent non-device regions; a first barrier layer on sidewalls of the edge fin; and an isolation layer on the base substrate. The isolation layer has a top surface lower than the edge fin and the middle fin structure, and covers a portion of the sidewalls of each of the edge fin and the middle fin structure. The isolation layer further has a material density smaller than the first barrier layer.