A crystalline channel layer of a semiconductor material is formed in a backend process over a crystalline dielectric seed layer. A crystalline magnesium oxide MgO is formed over an amorphous inter-layer dielectric layer. The crystalline MgO provides physical link to the formation of a crystalline semiconductor layer thereover.

The fabrication of a first waveguide made of stoichiometric silicon nitride, of a second waveguide made of crystalline semiconductor material and of at least one active component optically coupled to the first waveguide via the second waveguide. The method includes: a) the formation of an aperture which passes through an encapsulation layer of the first waveguide and emerges in or on a substrate made of monocrystalline silicon, then b) the deposition by epitaxial growth of a crystalline seeding material inside the aperture until this crystalline seeding material forms a crystalline seed on a top face of the encapsulation layer, then c) a lateral epitaxy, of a crystalline semiconductor material from the crystalline seed formed to form a layer made of crystalline semiconductor material wherein the second waveguide is then produced.

A nanowire includes an electrically conductive catalyst nanoparticle first portion, a semiconductor wire second portion, a first dielectric shell around the first portion, and a second dielectric shell or functionalization around the second portion. A material of the second dielectric shell or functionalization is different from a material of the first shell.

Embodiments described herein include a method for forming a vertical hetero-stack and a device including a vertical hetero-stack. An example method is used to form a vertical hetero-stack of a first nanostructure and a second nanostructure arranged on an upper surface of the first nanostructure. The first nanostructure is formed by a first transition metal dichalcogenide, TMDC, material and the second nanostructure is formed by a second TMDC material. The example method includes providing the first nanostructure on a substrate. The method also includes forming a reactive layer of molecules on the first nanostructure along a periphery of the upper surface. The method further includes forming the second nanostructure by a vapor deposition process. The second TMDC material nucleates on the reactive layer of molecules along the periphery and grows laterally therefrom to form the second nanostructure on the upper surface.

Methods, systems, and devices for on-die formation of single-crystal semiconductor structures are described. In some examples, a layer of semiconductor material may be deposited above one or more decks of memory cells and divided into a set of patches. A respective crystalline arrangement of each patch may be formed based on nearly or partially melting the semiconductor material, such that nucleation sites remain in the semiconductor material, from which respective crystalline arrangements may grow. Channel portions of transistors may be formed at least in part by doping regions of the crystalline arrangements of the semiconductor material. Accordingly, operation of the memory cells may be supported by lower circuitry (e.g., formed at least in part by doped portions of a crystalline semiconductor substrate), and upper circuitry (e.g., formed at least in part by doped portions of a semiconductor deposited over the memory cells and formed with a crystalline arrangement in-situ).

A buffer layer is employed to fabricate diamond membranes and allow reuse of diamond substrates. In this approach, diamond membranes are fabricated on the buffer layer, which in turn is disposed on a diamond substrate that is lattice-matched to the diamond membrane. The weak bonding between the buffer layer and the diamond substrate allows ready release of the fabricated diamond membrane. The released diamond membrane is transferred to another substrate to fabricate diamond devices, while the diamond substrate is reused for another fabrication.

The present invention provides a method for producing a Group III nitride crystal, capable of producing a Group III nitride crystal in a large size with few defects and high quality. The method is a method for producing a Group III nitride crystal (13), including: a seed crystal selection step of selecting plural parts of a Group III nitride crystal layer (11) as seed crystals for generation and growth of Group III nitride crystals (13); a contact step of causing the surfaces of the seed crystals to be in contact with an alkali metal melt; a crystal growth step of causing a Group III element and nitrogen to react with each other under a nitrogen-containing atmosphere in the alkali metal melt to generate and grow the Group III nitride crystals (13), wherein the seed crystals are hexagonal crystals, in the seed crystal selection step, the seed crystals are arranged so that m-planes of the respective crystals grown from the seed crystals that are adjacent to each other do not substantially coincide with each other, and in the crystal growth step, the plural Group III nitride crystals (13) grown from the plural seed crystals by the growth of the Group III nitride crystals (13) are bound.

A semiconductor substrate, comprising a first semiconductor material, is provided and an insulating layer is formed thereon; an opening is formed in the insulating layer. Thereby, a seed surface of the substrate is exposed. The opening has sidewalls and a bottom and the bottom corresponds to the seed surface of the substrate. A cavity structure is formed above the insulating layer, including the opening and a lateral growth channel extending laterally over the substrate. A matching array is grown on the seed surface of the substrate, including at least a first semiconductor matching structure comprising a second semiconductor material and a second semiconductor matching structure comprising a third semiconductor material. The compound semiconductor structure comprising a fourth semiconductor material is grown on a seed surface of the second matching structure. The first through fourth semiconductor materials are different from each other. Corresponding semiconductor structures are also included.

A method of forming a semiconductor device includes forming a first epitaxial layer over a substrate to form a wafer, depositing a dielectric layer over the first epitaxial layer, patterning the dielectric layer to form an opening, etching the first epitaxial layer through the opening to form a recess, forming a second epitaxial layer in the recess, etching the dielectric layer to expose a top surface of the first epitaxial layer, and planarizing the exposed top surface of the first epitaxial layer and a top surface of the second epitaxial layer.

There is provided a technique that includes: (a) forming a silicon seed layer on a substrate by performing a cycle a predetermined number of times, the cycle including non-simultaneously performing: (a1) supplying a first gas containing halogen and silicon to the substrate; and (a2) supplying a second gas containing hydrogen to the substrate; and (b) forming a film containing silicon on the silicon seed layer by supplying a third gas containing silicon to the substrate, wherein a pressure of a space in which the substrate is located in (a2) is set higher than a pressure of the space in which the substrate is located in (a1).