A semiconductor device and its manufacturing method, relating to semiconductor techniques. The semiconductor device manufacturing method comprises: forming a patterned first hard mask layer on a substrate to define a position for buried layers; conducting a first ion implantation using the first hard mask layer as a mask to form a first buried layer and a second buried layer both having a first conductive type and separated from each other at two sides of the first hard mask layer in the substrate; conducting a second ion implantation to form a separation region with a second conductive type opposite to the first conductive type in the substrate between the first and the second buried layers; removing the first hard mask layer; and forming a semiconductor layer on the substrate. This inventive concept reduces an area budget of a substrate and simplifies the manufacturing process.

A semiconductor device includes a first IGBT cell having a second-type doped drift zone and a desaturation semiconductor structure for desaturating a charge carrier concentration in the first IGBT cell. The desaturation semiconductor structure includes a first-type doped region forming a pn-junction with the drift zone and two trenches arranged in the first-type doped region and arranged beside the first IGBT cell in a lateral direction. The two trenches confine a mesa region including a first-type doped desaturation channel region and a first-type doped body region at least in the lateral direction. The desaturation channel region and the body region adjoin each other, and the desaturation channel region is a depletable region. Related methods of manufacture are also described.

A semiconductor device and method of forming the same are provided. The semiconductor device includes a substrate, a growth promoting region, a first gate stack, and a second gate stack. The substrate includes a first region and a second region. The growth promoting region is located in a surface of the substrate in the first region. The growth promoting region includes a first implantation species, and a surface of the substrate in the second region is free of the first implantation species. The first gate stack includes a first gate dielectric layer on the substrate in the first region. The second gate stack includes a second gate dielectric layer on the substrate in the second region.

A semiconductor device includes a field-effect transistor, a first back-end-of-line (BEOL) metallization level and a second BEOL metallization level disposed above the first BEOL metallization level. A portion of the field-effect transistor includes lithium therein, and the field-effect transistor is integrated between the first and second BEOL metallization levels. The portion of the field-effect transistor including the lithium therein can be a channel layer, or a source and/or drain region.

A semiconductor device and its manufacturing method, relating to semiconductor techniques. The semiconductor device manufacturing method comprises: forming a patterned first hard mask layer on a substrate to define a position for buried layers; conducting a first ion implantation using the first hard mask layer as a mask to form a first buried layer and a second buried layer both having a first conductive type and separated from each other at two sides of the first hard mask layer in the substrate; conducting a second ion implantation to form a separation region with a second conductive type opposite to the first conductive type in the substrate between the first and the second buried layers; removing the first hard mask layer; and forming a semiconductor layer on the substrate. This inventive concept reduces an area budget of a substrate and simplifies the manufacturing process.

Methods of fabricating FinFET devices are provided. The method includes forming a fin over a substrate. The method also includes implanting a first dopant on a top surface of the fin and implanting a second dopant on a sidewall surface of the fin. The first dopant is different from the second dopant. The method further includes forming an oxide layer on the top surface and the sidewall surface of the fin, and forming a gate electrode layer over the oxide layer.

A method for fabricating semiconductor device includes the steps of: providing a substrate having a NMOS region and a PMOS region; forming a pad oxide layer on the substrate, wherein the pad oxide layer comprises a first thickness; performing an implantation process to inject germanium (Ge) into the substrate on the PMOS region; performing a first cleaning process to reduce the first thickness of the pad oxide layer on the PMOS region to a second thickness; performing an anneal process; and performing a second cleaning process to remove the pad oxide layer.

A method of fabricating a semiconductor structure includes forming a plurality of Fin structures, doping first dopants at both sides of a first Fin structure of the Fin structures, and providing a first thermal diffusion operation to the semiconductor structure. The method also includes doping second dopants at both sides of a second Fin structure of the Fin structures, and providing a second thermal diffusion operation to the semiconductor structure. A first gate length for the first Fin structure is formed using the first and the second thermal diffusion operations, and a second gate length for the second Fin structure using the second thermal diffusion operation. The first dopants are of the same type or a different type.

Provided is a semiconductor device includes a gate stack, a first doped region, a second doped region, a first lightly doped region and a second lightly doped region. The gate stack is disposed on a substrate. The first doped region is located in the substrate at a first side of the gate stack. The second doped region is located in the substrate at a second side of the gate stack. The first lightly doped region is located in the substrate between the gate stack and the first doped region. The second lightly doped region is located in the substrate between the gate stack and the second doped region. A property of the first lightly doped region is different from a property of the second lightly doped region.

A semiconductor device and its manufacturing method, relating to semiconductor techniques. The semiconductor device manufacturing method comprises: forming a patterned first hard mask layer on a substrate to define a position for buried layers; conducting a first ion implantation using the first hard mask layer as a mask to form a first buried layer and a second buried layer both having a first conductive type and separated from each other at two sides of the first hard mask layer in the substrate; conducting a second ion implantation to form a separation region with a second conductive type opposite to the first conductive type in the substrate between the first and the second buried layers; removing the first hard mask layer; and forming a semiconductor layer on the substrate. This inventive concept reduces an area budget of a substrate and simplifies the manufacturing process.