A method for selectively depositing a metallic film on a substrate comprising a first dielectric surface and a second metallic surface is disclosed. The method may include, exposing the substrate to a passivating agent, performing a surface treatment on the second metallic surface, and selectively depositing the metallic film on the first dielectric surface relative to the second metallic surface. Semiconductor device structures including a metallic film selectively deposited by the methods of the disclosure are also disclosed.

A transistor comprises a substrate, a pair of spacers on the substrate, a gate dielectric layer on the substrate and between the pair of spacers, a gate electrode layer on the gate dielectric layer and between the pair of spacers, an insulating cap layer on the gate electrode layer and between the pair of spacers, and a pair of diffusion regions adjacent to the pair of spacers. The insulating cap layer forms an etch stop structure that is self aligned to the gate and prevents the contact etch from exposing the gate electrode, thereby preventing a short between the gate and contact. The insulator-cap layer enables self-aligned contacts, allowing initial patterning of wider contacts that are more robust to patterning limitations.

A method for manufacturing a semiconductor device includes the following steps. An epitaxial layer is formed on a substrate. Then, a body is formed in an upper portion of the epitaxial layer. A first dielectric layer, a second dielectric layer, and a third dielectric layer are sequentially formed on the epitaxial layer. The third dielectric layer forms a second trench, and the second trench is located in the first trench. A shield layer is formed in the second trench. The upper portion of the third dielectric layer is removed, such that the upper portion of the shield layer protrudes from the third dielectric layer. A fourth dielectric layer is formed to cover the upper portion of the shield layer. A gate is formed on the third dielectric layer. A source is formed in the epitaxial layer surrounding the gate.

A method of fabricating a buried word line includes forming a trench in a substrate. Next, a deposition process is performed to form a silicon layer on a sidewall and a bottom at the inner side of the trench. After the deposition process, a gate dielectric layer is formed in the trench. Finally, a conductive layer is formed to fill in the trench.

A semiconductor device includes a gate dielectric layer and a gate electrode formed on the gate dielectric layer. The gate electrode includes a first metal layer, a second metal layer, and a third metal layer. The first metal layer includes an oxygen-gettering composition. The second metal layer includes oxygen. The third metal layer includes an interface with a polysilicon layer.

A method of removing an oxide layer is provided. A metal layer is deposited over an oxide layer formed at a top surface of a germanium substrate. A metal oxide layer is deposited over the metal layer. The metal oxide layer includes a same metal material as the metal layer. The metal layer and the oxide layer are reacted and combined with the metal oxide layer to form a dielectric layer during an anneal process. During the anneal process, the oxide layer is reacted with the metal layer and removed.

A method of forming a high-? dielectric cap layer on a semiconductor structure formed on a substrate includes depositing the high-? dielectric cap layer on the semiconductor structure, depositing a sacrificial silicon cap layer on the high-? dielectric cap layer, performing a post cap anneal process to harden and densify the as-deposited high-? dielectric cap layer, and removing the sacrificial silicon cap layer.

A method for fabricating a semiconductor device includes forming a first high-k (HK) dielectric layer over a substrate, performing a wet treatment process to the first HK dielectric layer. The wet treatment includes a dopant. The method also includes performing an annealing process to the first HK dielectric layer such that the dopant diffuses into the first HK dielectric layer to form a modified HK dielectric layer. Therefore the modified HK dielectric layer has a second dielectric constant which is different than the first dielectric constant.

A thin-film transistor (TFT) substrate includes a backing plate, a gate electrode formed on the backing plate, a gate insulation layer formed on the gate electrode and the backing plate, an active layer formed on the gate insulation layer, a source electrode and a drain electrode formed on the active layer and the gate insulation layer, a passivation layer formed on the source electrode, the drain electrode, the active layer, and the gate insulation layer, and a pixel electrode formed on the passivation layer. The gate insulation layer is formed of a material that is an oxide of a material that makes the gate electrode. The passivation layer is formed of a material that is an oxide of a material that makes the source electrode and the drain electrode.

Methods of manufacturing and processing semiconductor devices (i.e., electronic devices) are described. Embodiments of the disclosure advantageously provide electronic devices which meet reduced thickness, lower thermal budget, and Vt requirements, and have improved device performance and reliability. The electronic devices described herein comprise a source region, a drain region, and a channel separating the source region and the drain region, an interfacial layer on a top surface of the channel, a high-? dielectric layer on the interfacial layer, a dipole layer on the high-? dielectric layer, and a capping layer on the dipole layer. In some embodiments, the dipole layer comprises a metal oxynitride (MON), such as aluminum oxynitride (AlON). In some embodiments, the methods comprise annealing the substrate to drive atoms from the dipole layer into one or more of the interfacial layer or the high-? dielectric layer.