In an embodiment, a device includes: a bottom integrated circuit die having a first front side and a first back side; a top integrated circuit die having a second front side and a second back side, the second back side being bonded to the first front side, the top integrated circuit die being free from through substrate vias (TSVs); a dielectric layer surrounding the top integrated circuit die, the dielectric layer being disposed on the first front side, the dielectric layer and the bottom integrated circuit die being laterally coterminous; and a through via extending through the dielectric layer, the through via being electrically coupled to the bottom integrated circuit die, surfaces of the through via, the dielectric layer, and the top integrated circuit die being planar.

A polishing composition having silica-based abrasive grains and a polishing method. A polishing composition having silica particles, wherein on the basis of a colloidal silica dispersion of the silica particles, the dispersion has an Rsp of 0.15 to 0.7 as measured using pulse NMR, and the colloidal silica particles have a shape coefficient SF1 of 1.20 to 1.80, wherein Rsp is calculated based on equation (1):

Rsp=(Rav−Rb)/(Rb)  (1) (wherein Rsp is an index that indicates water affinity; Rav is an inverse of a relaxation time of the colloidal silica dispersion; and Rb is an inverse of a relaxation time of a blank aqueous solution obtained by removing the silica particles from the colloidal silica dispersion), and the shape coefficient SF1 is calculated based on equation (2):

SF1=(area of a circle whose diameter is a maximum diameter of the particle)/(projected area)  (2).

The present disclosure relates to an integrated chip. The integrated chip includes a substrate. A first conductive feature is over the substrate. A second conductive feature is over the substrate and is adjacent to the first conductive feature. The first and second conductive features are separated by a cavity. A dielectric liner extends from the first conductive feature to the second conductive feature along a bottom of the cavity and further extends along opposing sidewalls of the first and second conductive features. A dielectric cap covers and seals the cavity. The dielectric cap has a top surface that is approximately planar with top surfaces of the first and second conductive features. The first conductive feature and the second conductive feature comprise graphene intercalated with one or more metals.

In a variety of processes for forming electronic devices that use spin-on dielectric materials, properties of the spin-on dielectric materials can be enhanced by curing these materials using plasma doping. For example, hardness and Young's modulus can be increased for the cured material. Other properties may be enhanced. The plasma doping to cure the spin-on dielectric materials uses a mechanism that is a combination of plasma ion implant and high energy radiation associated with the species ionized. In addition, physical properties of the spin-on dielectric materials can be modified along a length of the spin-on dielectric materials by selection of an implant energy and dopant dose for the particular dopant used, corresponding to a selection variation with respect to length.

An integrated circuit includes a substrate, an isolation feature disposed over the substrate, a fin extending from the substrate alongside the isolation feature such that the fin extends above the isolation feature, and a dielectric layer disposed over the isolation feature. A top surface of the dielectric layer is at a same level as a top surface of the fin or below a top surface of the fin by less than or equal to 15 nanometers.

A slurry containing abrasive grains and a liquid medium, in which the abrasive grains include first particles and second particles in contact with the first particles, the first particles contain cerium oxide, the second particles contain a cerium compound, and in a case where a content of the abrasive grains is 2.0% by mass, a BET specific surface area of a solid phase obtained when the slurry is subjected to centrifugal separation for 30 minutes at a centrifugal acceleration of 1.1×10.sup.4 G is 24 m.sup.2/g or more.

The invention provides a method for polishing or planarizing a substrate. First, the method comprises attaching a polymer-polymer composite polishing pad to a polishing device. The polishing pad has a polymer matrix and fluoropolymer particles embedded in the polymeric matrix. The fluoropolymer particles have a zeta potential more negative than the polymeric matrix. Cationic particle-containing slurry is applied to the polishing pad. Conditioning the polymer-polymer composite polishing pad exposes the fluoropolymer particles to the polishing surface and creates fluoropolymer-containing debris particles in the slurry. Polishing or planarizing the substrate with the increased electronegativity from the fluoropolymer at the polishing surface and in the fluoropolymer-containing debris particles stabilizes the cationic particle-containing slurry to decreases the precipitation rate of the cationic particle-containing slurry.

A semiconductor substrate has an exposed surface having a compositionally uniform metal, and an embedded surface having the metal and an oxide. The exposed surface is polished using a first slurry including a first abrasive and a first amine-based alkaline until the embedded surface is exposed. The embedded surface is polished using a second slurry including a second abrasive and a second amine-based alkaline. The second abrasive is different from the first abrasive. The second amine-based alkaline is different from the first amine-based alkaline. The metal and the oxide each has a first and a second removal rate in the first slurry, respectively, and a third and fourth removal rate in the second slurry, respectively. A ratio of the first removal rate to the second removal rate is greater than 30:1, and a ratio of the third removal rate to the fourth removal rate is about 1:0.5 to about 1:2.

An aspect of the present invention provides a polishing agent for polishing a base substrate having an organic silicon oxide and an insulating material containing silicon (excluding the organic silicon oxide) to remove at least a part of the organic silicon oxide, the polishing agent containing abrasive grains containing silica and an allylamine-based polymer, in which the abrasive grains have a positive charge in the polishing agent, the allylamine-based polymer is at least one selected from the group consisting of a tertiary allylamine-based polymer and a quaternary allylamine-based polymer, and a pH of the polishing agent is 2.8 to 5.0.

A polishing liquid containing abrasive grains, a hydroxy acid, a polyol, and a liquid medium, in which a zeta potential of the abrasive grains is positive, and the hydroxy acid has one carboxyl group and one to three hydroxyl groups.