A method for manufacturing a semiconductor device comprising: providing a substrate, wherein an amorphous silicon layer is formed on the substrate; forming an etching auxiliary layer on the amorphous silicon layer, wherein the upper surface of the etching auxiliary layer is flat, and the etching auxiliary layer is made of a single material; and etching the amorphous silicon layer and the etching auxiliary layer to obtain an amorphous silicon layer with a target thickness, wherein the upper surface of the etched amorphous silicon layer is flat.

Methods of forming an oxide layer over a semiconductor substrate are provided. The method includes forming a first oxide containing portion of the oxide layer over a semiconductor substrate at a first growth rate by exposing the substrate to a first gas mixture having a first oxygen percentage at a first temperature. A second oxide containing portion is formed over the substrate at a second growth rate by exposing the substrate to a second gas mixture having a second oxygen percentage at a second temperature. A third oxide containing portion is formed over the substrate at a third growth rate by exposing the substrate to a third gas mixture having a third oxygen percentage at a third temperature. The first growth rate is slower than each subsequent growth rate and each growth rate subsequent to the second growth rate is within 50% of each other.

A substrate processing method includes: a carry-in step of carrying a substrate having a silicon-containing film on a surface of the substrate into a processing container; a first step of forming an adsorption layer by supplying an oxygen-containing gas into the processing container and causing the oxygen-containing gas to be adsorbed on a surface of the silicon-containing film; a second step of forming a silicon oxide layer by supplying an argon-containing gas into the processing container and causing the adsorption layer and the surface of the silicon-containing film to react with each other with plasma of the argon-containing gas; and a third step of forming a graphene film on the silicon oxide layer by supplying a carbon-containing gas into the processing container with plasma of the carbon-containing gas.

A semiconductor device structure is provided. The semiconductor device includes a first nanowire structure over a second nanowire structure, a gate stack wrapping around the first nanowire structure and the second nanowire structure, a source/drain feature adjoining the first nanowire structure and the second nanowire structure, a gate spacer layer over the first nanowire structure and between the gate stack and the source/drain feature, and an inner spacer layer between the first nanowire structure and the second nanowire structure and between the gate stack and the source/drain feature. The gate spacer layer has a first carbon concentration, the inner spacer has a second carbon concentration, and the second carbon concentration is lower than the first carbon concentration.

Exemplary processing methods may include forming a plasma of a silicon-containing precursor. The methods may include depositing a flowable film on a semiconductor substrate with plasma effluents of the silicon-containing precursor. The processing region may be at least partially defined between a faceplate and a substrate support on which the semiconductor substrate is seated. A bias power may be applied to the substrate support from a bias power source. The methods may include forming a plasma of a hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include etching the flowable film from a sidewall of the feature within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor. The methods may include densifying remaining flowable film within the feature defined within the semiconductor substrate with plasma effluents of the hydrogen-containing precursor.

According to one or more embodiments, a method for manufacturing a semiconductor device comprises forming a stacked film that comprises alternating first insulating layers and second insulating layers. A first insulating film, an electric charge storage layer, a second insulating film, and a first semiconductor layer are then formed in a hole in the stacked film. The method further includes forming a first recess in the stacked film, then supplying a first gas and a deuterium gas to the first recess. The first gas comprises hydrogen and oxygen.

A method of forming a semiconductor device includes forming a first dummy gate structure and a second dummy gate structure over a fin; forming a first dielectric layer around the first dummy gate structure and around the second dummy gate structure; removing the first dummy gate structure and the second dummy gate structure to form a first recess and a second recess in the first dielectric layer, respectively; forming a gate dielectric layer in the first recess and the second recess; forming a first work function layer over the gate dielectric layer in the first and the second recesses; removing the first work function layer from the first recess; converting a surface layer of the first work function layer in the second recess into an oxide; and forming a second work function layer in the first recess over the gate dielectric layer and in the second recess over the oxide.

In an embodiment, a method includes: performing a self-limiting process to modify a top surface of a wafer; after the self-limiting process completes, removing the modified top surface from the wafer; and repeating the performing the self-limiting process and the removing the modified top surface from the wafer until a thickness of the wafer is decreased to a predetermined thickness.

Methods of patterning semiconductor devices and semiconductor devices formed by the same are disclosed. In an embodiment, a method includes forming a first dielectric layer over a semiconductor substrate; forming a first hard mask layer over the first dielectric layer; etching the first hard mask layer to form a first opening exposing a top surface of the first dielectric layer; performing a plasma treatment process on the top surface of the first dielectric layer and a top surface of the first hard mask layer; after performing the plasma treatment process, selectively depositing a spacer on a side surface of the first hard mask layer, the top surface of the first dielectric layer and the top surface of the first hard mask layer being free from the spacer after selectively depositing the spacer; and etching the first dielectric layer using the spacer as a mask.

A semiconductor device having a gate structure and a method of forming same are provided. The semiconductor device includes a substrate and a gate structure over the substrate. The substrate has a first region and a second region. The gate structure extends across an interface between the first region and the second region. The gate structure includes a first gate dielectric layer over the first region, a second gate dielectric layer over the second region, a first work function layer over the first gate dielectric layer, a barrier layer along a sidewall of the first work function layer and above the interface between the first region and the second region, and a second work function layer over the first work function layer, the barrier layer and the second gate dielectric layer. The second work function layer is in physical contact with a top surface of the first work function layer.