H01L21/3211

Plasma treatment for thin film resistors on integrated circuits

A method of fabricating ICs including thin film resistors (TFRs) depositing a dielectric liner layer on a substrate including a semiconductor surface having a plurality of IC die formed therein each including functional circuitry comprising a plurality of interconnected transistors. A TFR layer comprising chromium (Cr) is deposited on the dielectric liner layer. The TFR layer is plasma treated with atomic nitrogen and atomic hydrogen. A dielectric capping layer is deposited on the TFR layer after the plasma treating. A pattern is formed on the capping layer, and the TFR layer is etched to form at least one resistor that comprises the TFR layer.

Wrap-Around Contact Plug and Method Manufacturing Same

A method includes forming a source/drain region, and in a vacuum chamber or a vacuum cluster system, preforming a selective deposition to form a metal silicide layer on the source/drain region, and a metal layer on dielectric regions adjacent to the source/drain region. The method further includes selectively etching the metal layer in the vacuum chamber, and selectively forming a metal nitride layer on the metal silicide layer. The selectively forming the metal nitride layer is performed in the vacuum chamber or a vacuum cluster system without vacuum break.

METHOD AND APPARATUS FOR SELECTIVE NITRIDATION PROCESS

Embodiments of the disclosure provide an improved apparatus and methods for nitridation of stacks of materials. In one embodiment, a method for processing a substrate in a processing region of a process chamber is provided. The method includes generating and flowing plasma species from a remote plasma source to a delivery member having a longitudinal passageway, flowing plasma species from the longitudinal passageway to an inlet port formed in a sidewall of the process chamber, wherein the plasma species are flowed at an angle into the inlet port to promote collision of ions or reaction of ions with electrons or charged particles in the plasma species such that ions are substantially eliminated from the plasma species before entering the processing region of the process chamber, and selectively incorporating atomic radicals from the plasma species in silicon or polysilicon regions of the substrate.

SEMICONDUCTOR DEVICE STRUCTURE WITH INNER SPACER LAYER

A semiconductor device structure is provided. The semiconductor device structure includes forming semiconductor device structure includes a gate stack wrapping around a plurality of nanowire structures. The gate stack includes a first portion above the plurality of nanowire structures and second portions between the nanowire structures. The semiconductor device structure further includes a gate spacer layer along a sidewall of the first portion of the gate stack, and a plurality of inner spacer layers along sidewalls of the second portions of the gate stack. The gate spacer layer has a first carbon concentration, the inner spacer layers have a second carbon concentration, and the second carbon concentration is lower than the first carbon concentration.

Wrap-Around Contact Plug and Method Manufacturing Same

A method includes forming a source/drain region, and in a vacuum chamber or a vacuum cluster system, preforming a selective deposition to form a metal silicide layer on the source/drain region, and a metal layer on dielectric regions adjacent to the source/drain region. The method further includes selectively etching the metal layer in the vacuum chamber, and selectively forming a metal nitride layer on the metal silicide layer. The selectively forming the metal nitride layer is performed in the vacuum chamber or a vacuum cluster system without vacuum break.

NAND Memory Arrays, Devices Comprising Semiconductor Channel Material and Nitrogen, and Methods of Forming NAND Memory Arrays
20190013404 · 2019-01-10 ·

Some embodiments include device having a gate spaced from semiconductor channel material by a dielectric region, and having nitrogen-containing material directly against the semiconductor channel material and on an opposing side of the semiconductor channel material from the dielectric region. Some embodiments include a device having a gate spaced from semiconductor channel material by a dielectric region, and having nitrogen within at least some of the semiconductor channel material. Some embodiments include a NAND memory array which includes a vertical stack of alternating insulative levels and wordline levels. Channel material extends vertically along the stack. Charge-storage material is between the channel material and the wordline levels. Dielectric material is between the channel material and the charge-storage material. Nitrogen is within the channel material. Some embodiments include methods of forming NAND memory arrays.

Method of Manufacturing Semiconductor Device and Non-Transitory Computer-readable Recording Medium

Described herein is a technique capable of improving electrical characteristics of a polysilicon film while suppressing damage to an underlying silicon oxide film. According to the technique described herein, there is provided a there is provided a method of manufacturing a semiconductor device, including: (a) preparing a substrate including a silicon oxide film and a polysilicon film formed on the silicon oxide film, wherein the polysilicon film includes a contact surface contacting the silicon oxide film and an exposed surface facing the contact surface; and (b) supplying a reactive species generated by plasma excitation of a gas containing hydrogen and oxygen to the exposed surface of the polysilicon film.

Method of manufacturing semiconductor device having air gap between wirings for low dielectric constant

A method of manufacturing a semiconductor device includes: (a) loading into a process chamber a substrate including: a wiring layer including a first interlayer insulating film, a plurality of copper-containing films formed on the first interlayer insulating film and used as a wiring, an inter-wire insulating film electrically insulating the plurality of copper containing film and a recess formed between the plurality of copper-containing film; and a first diffusion barrier film formed on a first portion of a surface of the plurality of copper-containing films to suppress a diffusion of a component of the plurality of copper-containing film; and (b) supplying a silicon-containing gas into the process chamber to form a silicon-containing film on: a surface of the recess; and a second portion of the surface of the plurality of copper-containing films other than the first portion where the first diffusion barrier film is formed.

Method of manufacturing semiconductor device including silicon nitride layer for inhibiting excessive oxidation of polysilicon film
10049870 · 2018-08-14 · ·

To inhibit excessive oxidation and increase oxidation resistance of a polysilicon film on a substrate during recovery process, an oxygen-containing silicon layer present on the substrate is modified into a silicon oxynitride layer or a silicon nitride layer with high nitrogen concentration prior to the recovery process by heating the substrate and supplying active species containing nitrogen radicals and hydrogen radicals for increasing nitrogen content in the silicon oxynitride layer or the silicon nitride layer.

Method and apparatus for selective nitridation process

Embodiments of the invention provide an improved apparatus and methods for nitridation of stacks of materials. In one embodiment, a remote plasma system includes a remote plasma chamber defining a first region for generating a plasma comprising ions and radicals, a process chamber defining a second region for processing a semiconductor device, the process chamber comprising an inlet port formed in a sidewall of the process chamber, the inlet port being in fluid communication with the second region, and a delivery member disposed between the remote plasma chamber and the process chamber and having a passageway in fluid communication with the first region and the inlet port, wherein the delivery member is configured such that a longitudinal axis of the passageway intersects at an angle of about 20 degrees to about 80 degrees with respect to a longitudinal axis of the inlet port.